drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c- Extension
.c- Size
- 267748 bytes
- Lines
- 8182
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/pci.hamdgpu.hamdgpu_pm.hamdgpu_dpm.hamdgpu_atombios.hamdgpu_dpm_internal.hamd_pcie.hatom.hgfx_v6_0.hr600_dpm.hsid.hsi_dpm.h../include/pptable.hlinux/math64.hlinux/seq_file.hlinux/firmware.hlegacy_dpm.hbif/bif_3_0_d.hbif/bif_3_0_sh_mask.hdce/dce_6_0_d.hdce/dce_6_0_sh_mask.hgca/gfx_6_0_d.hgca/gfx_6_0_sh_mask.hsmu/smu_6_0_d.hsmu/smu_6_0_sh_mask.h
Detected Declarations
enum si_dpm_auto_throttle_srcenum si_dpm_event_srcfunction si_calculate_leakage_for_v_and_t_formulafunction si_calculate_leakage_for_v_and_tfunction si_calculate_leakage_for_v_formulafunction si_calculate_leakage_for_vfunction si_update_dte_from_pl2function si_initialize_powertune_defaultsfunction si_get_smc_power_scaling_factorfunction si_calculate_cac_wintimefunction si_scale_power_for_smcfunction si_calculate_adjusted_tdp_limitsfunction si_populate_smc_tdp_limitsfunction si_populate_smc_tdp_limits_2function si_calculate_power_efficiency_ratiofunction si_should_disable_uvd_powertunefunction si_populate_power_containment_valuesfunction si_populate_sq_ramping_valuesfunction si_enable_power_containmentfunction si_initialize_smc_dte_tablesfunction si_get_cac_std_voltage_max_minfunction si_get_cac_std_voltage_stepfunction si_init_dte_leakage_tablefunction si_init_simplified_leakage_tablefunction si_initialize_smc_cac_tablesfunction si_program_cac_config_registersfunction si_initialize_hardware_cac_managerfunction si_enable_smc_cacfunction si_init_smc_spll_tablefunction si_get_lower_of_leakage_and_vce_voltagefunction si_get_vce_clock_voltagefunction si_dpm_vblank_too_shortfunction ni_copy_and_switch_arb_setsfunction ni_update_current_psfunction ni_update_requested_psfunction ni_set_uvd_clock_before_set_eng_clockfunction ni_set_uvd_clock_after_set_eng_clockfunction btc_find_voltagefunction btc_find_valid_clockfunction btc_get_valid_mclkfunction btc_get_valid_sclkfunction btc_get_max_clock_from_voltage_dependency_tablefunction btc_apply_voltage_dependency_rulesfunction btc_adjust_clock_combinationsfunction btc_apply_voltage_delta_rulesfunction r600_calculate_u_and_pfunction r600_calculate_atfunction r600_is_uvd_state
Annotated Snippet
switch (adev->pdev->device) {
case 0x6798:
si_pi->dte_data.enable_dte_by_default = true;
break;
case 0x6799:
si_pi->dte_data = dte_data_new_zealand;
break;
case 0x6790:
case 0x6791:
case 0x6792:
case 0x679E:
si_pi->dte_data = dte_data_aruba_pro;
update_dte_from_pl2 = true;
break;
case 0x679B:
si_pi->dte_data = dte_data_malta;
update_dte_from_pl2 = true;
break;
case 0x679A:
si_pi->dte_data = dte_data_tahiti_pro;
update_dte_from_pl2 = true;
break;
default:
if (si_pi->dte_data.enable_dte_by_default == true)
DRM_ERROR("DTE is not enabled!\n");
break;
}
} else if (adev->asic_type == CHIP_PITCAIRN) {
si_pi->cac_weights = cac_weights_pitcairn;
si_pi->lcac_config = lcac_pitcairn;
si_pi->cac_override = cac_override_pitcairn;
si_pi->powertune_data = &powertune_data_pitcairn;
switch (adev->pdev->device) {
case 0x6810:
case 0x6818:
si_pi->dte_data = dte_data_curacao_xt;
update_dte_from_pl2 = true;
break;
case 0x6819:
case 0x6811:
si_pi->dte_data = dte_data_curacao_pro;
update_dte_from_pl2 = true;
break;
case 0x6800:
case 0x6806:
si_pi->dte_data = dte_data_neptune_xt;
update_dte_from_pl2 = true;
break;
default:
si_pi->dte_data = dte_data_pitcairn;
break;
}
} else if (adev->asic_type == CHIP_VERDE) {
si_pi->lcac_config = lcac_cape_verde;
si_pi->cac_override = cac_override_cape_verde;
si_pi->powertune_data = &powertune_data_cape_verde;
switch (adev->pdev->device) {
case 0x683B:
case 0x683F:
case 0x6829:
case 0x6835:
si_pi->cac_weights = cac_weights_cape_verde_pro;
si_pi->dte_data = dte_data_cape_verde;
break;
case 0x682C:
si_pi->cac_weights = cac_weights_cape_verde_pro;
si_pi->dte_data = dte_data_sun_xt;
update_dte_from_pl2 = true;
break;
case 0x6825:
case 0x6827:
si_pi->cac_weights = cac_weights_heathrow;
si_pi->dte_data = dte_data_cape_verde;
break;
case 0x6824:
case 0x682D:
si_pi->cac_weights = cac_weights_chelsea_xt;
si_pi->dte_data = dte_data_cape_verde;
break;
case 0x682F:
si_pi->cac_weights = cac_weights_chelsea_pro;
si_pi->dte_data = dte_data_cape_verde;
break;
case 0x6820:
si_pi->cac_weights = cac_weights_heathrow;
si_pi->dte_data = dte_data_venus_xtx;
break;
case 0x6821:
Annotation
- Immediate include surface: `linux/module.h`, `linux/pci.h`, `amdgpu.h`, `amdgpu_pm.h`, `amdgpu_dpm.h`, `amdgpu_atombios.h`, `amdgpu_dpm_internal.h`, `amd_pcie.h`.
- Detected declarations: `enum si_dpm_auto_throttle_src`, `enum si_dpm_event_src`, `function si_calculate_leakage_for_v_and_t_formula`, `function si_calculate_leakage_for_v_and_t`, `function si_calculate_leakage_for_v_formula`, `function si_calculate_leakage_for_v`, `function si_update_dte_from_pl2`, `function si_initialize_powertune_defaults`, `function si_get_smc_power_scaling_factor`, `function si_calculate_cac_wintime`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.