drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h- Extension
.h- Size
- 14375 bytes
- Lines
- 411
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ppsmc.h
Detected Declarations
struct PP_SIslands_Dpm2PerfLevelstruct PP_SIslands_DPM2Statusstruct PP_SIslands_DPM2Parametersstruct PP_SIslands_PAPMStatusstruct PP_SIslands_PAPMParametersstruct SISLANDS_SMC_SCLK_VALUEstruct SISLANDS_SMC_MCLK_VALUEstruct SISLANDS_SMC_VOLTAGE_VALUEstruct SISLANDS_SMC_HW_PERFORMANCE_LEVELstruct SISLANDS_SMC_SWSTATEstruct SISLANDS_SMC_SWSTATE_SINGLEstruct SISLANDS_SMC_VOLTAGEMASKTABLEstruct SISLANDS_SMC_STATETABLEstruct PP_SIslands_FanTablestruct PP_SIslands_CacConfigstruct SMC_SIslands_MCRegisterAddressstruct SMC_SIslands_MCRegisterSetstruct SMC_SIslands_MCRegistersstruct SMC_SIslands_MCArbDramTimingRegisterSetstruct SMC_SIslands_MCArbDramTimingRegistersstruct SMC_SISLANDS_SPLL_DIV_TABLEstruct Smc_SIslands_DTE_Configuration
Annotated Snippet
struct PP_SIslands_Dpm2PerfLevel {
uint8_t MaxPS;
uint8_t TgtAct;
uint8_t MaxPS_StepInc;
uint8_t MaxPS_StepDec;
uint8_t PSSamplingTime;
uint8_t NearTDPDec;
uint8_t AboveSafeInc;
uint8_t BelowSafeInc;
uint8_t PSDeltaLimit;
uint8_t PSDeltaWin;
uint16_t PwrEfficiencyRatio;
uint8_t Reserved[4];
};
typedef struct PP_SIslands_Dpm2PerfLevel PP_SIslands_Dpm2PerfLevel;
struct PP_SIslands_DPM2Status {
uint32_t dpm2Flags;
uint8_t CurrPSkip;
uint8_t CurrPSkipPowerShift;
uint8_t CurrPSkipTDP;
uint8_t CurrPSkipOCP;
uint8_t MaxSPLLIndex;
uint8_t MinSPLLIndex;
uint8_t CurrSPLLIndex;
uint8_t InfSweepMode;
uint8_t InfSweepDir;
uint8_t TDPexceeded;
uint8_t reserved;
uint8_t SwitchDownThreshold;
uint32_t SwitchDownCounter;
uint32_t SysScalingFactor;
};
typedef struct PP_SIslands_DPM2Status PP_SIslands_DPM2Status;
struct PP_SIslands_DPM2Parameters {
uint32_t TDPLimit;
uint32_t NearTDPLimit;
uint32_t SafePowerLimit;
uint32_t PowerBoostLimit;
uint32_t MinLimitDelta;
};
typedef struct PP_SIslands_DPM2Parameters PP_SIslands_DPM2Parameters;
struct PP_SIslands_PAPMStatus {
uint32_t EstimatedDGPU_T;
uint32_t EstimatedDGPU_P;
uint32_t EstimatedAPU_T;
uint32_t EstimatedAPU_P;
uint8_t dGPU_T_Limit_Exceeded;
uint8_t reserved[3];
};
typedef struct PP_SIslands_PAPMStatus PP_SIslands_PAPMStatus;
struct PP_SIslands_PAPMParameters {
uint32_t NearTDPLimitTherm;
uint32_t NearTDPLimitPAPM;
uint32_t PlatformPowerLimit;
uint32_t dGPU_T_Limit;
uint32_t dGPU_T_Warning;
uint32_t dGPU_T_Hysteresis;
};
typedef struct PP_SIslands_PAPMParameters PP_SIslands_PAPMParameters;
struct SISLANDS_SMC_SCLK_VALUE {
uint32_t vCG_SPLL_FUNC_CNTL;
uint32_t vCG_SPLL_FUNC_CNTL_2;
uint32_t vCG_SPLL_FUNC_CNTL_3;
uint32_t vCG_SPLL_FUNC_CNTL_4;
uint32_t vCG_SPLL_SPREAD_SPECTRUM;
uint32_t vCG_SPLL_SPREAD_SPECTRUM_2;
uint32_t sclk_value;
};
typedef struct SISLANDS_SMC_SCLK_VALUE SISLANDS_SMC_SCLK_VALUE;
struct SISLANDS_SMC_MCLK_VALUE {
uint32_t vMPLL_FUNC_CNTL;
uint32_t vMPLL_FUNC_CNTL_1;
uint32_t vMPLL_FUNC_CNTL_2;
uint32_t vMPLL_AD_FUNC_CNTL;
uint32_t vMPLL_DQ_FUNC_CNTL;
uint32_t vMCLK_PWRMGT_CNTL;
uint32_t vDLL_CNTL;
uint32_t vMPLL_SS;
uint32_t vMPLL_SS2;
uint32_t mclk_value;
};
Annotation
- Immediate include surface: `ppsmc.h`.
- Detected declarations: `struct PP_SIslands_Dpm2PerfLevel`, `struct PP_SIslands_DPM2Status`, `struct PP_SIslands_DPM2Parameters`, `struct PP_SIslands_PAPMStatus`, `struct PP_SIslands_PAPMParameters`, `struct SISLANDS_SMC_SCLK_VALUE`, `struct SISLANDS_SMC_MCLK_VALUE`, `struct SISLANDS_SMC_VOLTAGE_VALUE`, `struct SISLANDS_SMC_HW_PERFORMANCE_LEVEL`, `struct SISLANDS_SMC_SWSTATE`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.