drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_overdriver.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_overdriver.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_overdriver.h- Extension
.h- Size
- 1563 bytes
- Lines
- 47
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/kernel.h
Detected Declarations
struct phm_fuses_default
Annotated Snippet
struct phm_fuses_default {
uint64_t key;
uint32_t VFT2_m1;
uint32_t VFT2_m2;
uint32_t VFT2_b;
uint32_t VFT1_m1;
uint32_t VFT1_m2;
uint32_t VFT1_b;
uint32_t VFT0_m1;
uint32_t VFT0_m2;
uint32_t VFT0_b;
};
extern int pp_override_get_default_fuse_value(uint64_t key,
struct phm_fuses_default *result);
#endif
Annotation
- Immediate include surface: `linux/types.h`, `linux/kernel.h`.
- Detected declarations: `struct phm_fuses_default`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.