drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c- Extension
.c- Size
- 182311 bytes
- Lines
- 5680
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/module.hlinux/pci.hlinux/slab.hhwmgr.hamd_powerplay.hhardwaremanager.hppatomfwctrl.hatomfirmware.hcgs_common.hvega10_powertune.hsmu9.hsmu9_driver_if.hvega10_inc.hsoc15_common.hpppcielanes.hvega10_hwmgr.hvega10_smumgr.hvega10_processpptables.hvega10_pptable.hvega10_thermal.hpp_debug.hamd_pcie_helpers.hppinterrupt.hpp_overdriver.hpp_thermal.hvega10_baco.hsmuio/smuio_9_0_offset.hsmuio/smuio_9_0_sh_mask.h
Detected Declarations
function vega10_set_default_registry_datafunction vega10_set_features_platform_capsfunction vega10_odn_initial_default_settingfunction vega10_init_dpm_defaultsfunction vega10_get_socclk_for_voltage_evvfunction vega10_get_evv_voltagesfunction vega10_patch_with_vdd_leakagefunction vega10_patch_lookup_table_with_leakagefunction vega10_patch_clock_voltage_limits_with_vddc_leakagefunction vega10_patch_voltage_dependency_tables_with_lookup_tablefunction vega10_sort_lookup_tablefunction vega10_complete_dependency_tablesfunction vega10_set_private_data_based_on_pptablefunction vega10_hwmgr_backend_finifunction vega10_hwmgr_backend_initfunction vega10_init_sclk_thresholdfunction vega10_setup_dpm_led_configfunction vega10_setup_asic_taskfunction vega10_trim_voltage_tablefunction vega10_get_mvdd_voltage_tablefunction vega10_get_vddci_voltage_tablefunction vega10_get_vdd_voltage_tablefunction vega10_trim_voltage_table_to_fit_state_tablefunction vega10_construct_voltage_tablesfunction vega10_init_dpm_statefunction vega10_setup_default_single_dpm_tablefunction vega10_setup_default_pcie_tablefunction vega10_setup_default_dpm_tablesfunction vega10_populate_ulv_statefunction vega10_populate_single_lclk_levelfunction vega10_override_pcie_parametersfunction vega10_populate_smc_link_levelsfunction vega10_populate_single_gfx_levelfunction vega10_populate_single_soc_levelfunction vega10_populate_all_graphic_levelsfunction vega10_populate_vddc_soc_levelsfunction vega10_populate_single_memory_levelfunction vega10_populate_all_memory_levelsfunction vega10_populate_single_display_typefunction vega10_populate_all_display_clock_levelsfunction vega10_populate_single_eclock_levelfunction vega10_populate_smc_vce_levelsfunction vega10_populate_single_vclock_levelfunction vega10_populate_single_dclock_levelfunction vega10_populate_smc_uvd_levelsfunction vega10_populate_clock_stretcher_tablefunction vega10_populate_avfs_parametersfunction vega10_acg_enable
Annotated Snippet
if (PP_CAP(PHM_PlatformCaps_ClockStretcher)) {
for (j = 1; j < socclk_table->count; j++) {
if (socclk_table->entries[j].clk == sclk &&
socclk_table->entries[j].cks_enable == 0) {
sclk += 5000;
break;
}
}
}
PP_ASSERT_WITH_CODE(!atomctrl_get_voltage_evv_on_sclk_ai(hwmgr,
VOLTAGE_TYPE_VDDC, sclk, vv_id, &vddc),
"Error retrieving EVV voltage value!",
continue);
/* need to make sure vddc is less than 2v or else, it could burn the ASIC. */
PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0),
"Invalid VDDC value", result = -EINVAL;);
/* the voltage should not be zero nor equal to leakage ID */
if (vddc != 0 && vddc != vv_id) {
data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = (uint16_t)(vddc/100);
data->vddc_leakage.leakage_id[data->vddc_leakage.count] = vv_id;
data->vddc_leakage.count++;
}
}
}
return 0;
}
/**
* vega10_patch_with_vdd_leakage - Change virtual leakage voltage to actual value.
*
* @hwmgr: the address of the powerplay hardware manager.
* @voltage: pointer to changing voltage
* @leakage_table: pointer to leakage table
*/
static void vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr,
uint16_t *voltage, struct vega10_leakage_voltage *leakage_table)
{
uint32_t index;
/* search for leakage voltage ID 0xff01 ~ 0xff08 */
for (index = 0; index < leakage_table->count; index++) {
/* if this voltage matches a leakage voltage ID */
/* patch with actual leakage voltage */
if (leakage_table->leakage_id[index] == *voltage) {
*voltage = leakage_table->actual_voltage[index];
break;
}
}
if (*voltage > ATOM_VIRTUAL_VOLTAGE_ID0)
pr_info("Voltage value looks like a Leakage ID but it's not patched\n");
}
/**
* vega10_patch_lookup_table_with_leakage - Patch voltage lookup table by EVV leakages.
*
* @hwmgr: the address of the powerplay hardware manager.
* @lookup_table: pointer to voltage lookup table
* @leakage_table: pointer to leakage table
* return: always 0
*/
static int vega10_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr,
phm_ppt_v1_voltage_lookup_table *lookup_table,
struct vega10_leakage_voltage *leakage_table)
{
uint32_t i;
for (i = 0; i < lookup_table->count; i++)
vega10_patch_with_vdd_leakage(hwmgr,
&lookup_table->entries[i].us_vdd, leakage_table);
return 0;
}
static int vega10_patch_clock_voltage_limits_with_vddc_leakage(
struct pp_hwmgr *hwmgr, struct vega10_leakage_voltage *leakage_table,
uint16_t *vddc)
{
vega10_patch_with_vdd_leakage(hwmgr, (uint16_t *)vddc, leakage_table);
return 0;
}
#endif
static int vega10_patch_voltage_dependency_tables_with_lookup_table(
Annotation
- Immediate include surface: `linux/delay.h`, `linux/module.h`, `linux/pci.h`, `linux/slab.h`, `hwmgr.h`, `amd_powerplay.h`, `hardwaremanager.h`, `ppatomfwctrl.h`.
- Detected declarations: `function vega10_set_default_registry_data`, `function vega10_set_features_platform_caps`, `function vega10_odn_initial_default_setting`, `function vega10_init_dpm_defaults`, `function vega10_get_socclk_for_voltage_evv`, `function vega10_get_evv_voltages`, `function vega10_patch_with_vdd_leakage`, `function vega10_patch_lookup_table_with_leakage`, `function vega10_patch_clock_voltage_limits_with_vddc_leakage`, `function vega10_patch_voltage_dependency_tables_with_lookup_table`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.