drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c- Extension
.c- Size
- 92944 bytes
- Lines
- 2997
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/module.hlinux/slab.hhwmgr.hamd_powerplay.hvega12_smumgr.hhardwaremanager.hppatomfwctrl.hatomfirmware.hcgs_common.hvega12_inc.hpppcielanes.hvega12_hwmgr.hvega12_processpptables.hvega12_pptable.hvega12_thermal.hvega12_ppsmc.hpp_debug.hamd_pcie_helpers.hppinterrupt.hpp_overdriver.hpp_thermal.hvega12_baco.h
Detected Declarations
function vega12_set_default_registry_datafunction vega12_set_features_platform_capsfunction vega12_init_dpm_defaultsfunction vega12_set_private_data_based_on_pptablefunction vega12_hwmgr_backend_finifunction vega12_hwmgr_backend_initfunction vega12_init_sclk_thresholdfunction vega12_setup_asic_taskfunction vega12_init_dpm_statefunction vega12_override_pcie_parametersfunction vega12_get_number_of_dpm_levelfunction vega12_get_dpm_frequency_by_indexfunction vega12_setup_single_dpm_tablefunction vega12_setup_default_dpm_tablesfunction vega12_save_default_power_profilefunction vega12_init_smc_tablefunction vega12_run_acg_btcfunction vega12_set_allowed_featuresmaskfunction vega12_init_powergate_statefunction vega12_enable_all_smu_featuresfunction vega12_disable_all_smu_featuresfunction vega12_odn_initialize_default_settingsfunction vega12_set_overdrive_target_percentagefunction vega12_power_control_set_levelfunction vega12_get_all_clock_ranges_helperfunction vega12_get_all_clock_rangesfunction vega12_populate_umdpstate_clocksfunction vega12_enable_dpm_tasksfunction vega12_patch_boot_statefunction vega12_find_lowest_dpm_levelfunction vega12_find_highest_dpm_levelfunction vega12_upload_dpm_min_levelfunction vega12_upload_dpm_max_levelfunction vega12_enable_disable_vce_dpmfunction vega12_dpm_get_sclkfunction vega12_dpm_get_mclkfunction vega12_get_metrics_tablefunction vega12_get_gpu_powerfunction vega12_get_current_gfx_clk_freqfunction vega12_get_current_mclk_freqfunction vega12_get_current_activity_percentfunction vega12_read_sensorfunction vega12_notify_smc_display_changefunction vega12_display_clock_voltage_requestfunction vega12_notify_smc_display_config_after_ps_adjustmentfunction vega12_force_dpm_highestfunction vega12_force_dpm_lowestfunction vega12_unforce_dpm_levels
Annotated Snippet
time_after(jiffies, data->metrics_time + msecs_to_jiffies(1))) {
ret = smum_smc_table_manager(hwmgr,
(uint8_t *)(&data->metrics_table),
TABLE_SMU_METRICS,
true);
if (ret) {
pr_info("Failed to export SMU metrics table!\n");
return ret;
}
data->metrics_time = jiffies;
}
if (metrics_table)
memcpy(metrics_table, &data->metrics_table, sizeof(SmuMetrics_t));
return ret;
}
static int vega12_get_gpu_power(struct pp_hwmgr *hwmgr, uint32_t *query)
{
SmuMetrics_t metrics_table;
int ret = 0;
ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);
if (ret)
return ret;
*query = metrics_table.CurrSocketPower << 8;
return ret;
}
static int vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx_freq)
{
uint32_t gfx_clk = 0;
*gfx_freq = 0;
PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16),
&gfx_clk) == 0,
"[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK Frequency Failed!",
return -EINVAL);
*gfx_freq = gfx_clk * 100;
return 0;
}
static int vega12_get_current_mclk_freq(struct pp_hwmgr *hwmgr, uint32_t *mclk_freq)
{
uint32_t mem_clk = 0;
*mclk_freq = 0;
PP_ASSERT_WITH_CODE(
smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_UCLK << 16),
&mem_clk) == 0,
"[GetCurrentMClkFreq] Attempt to get Current MCLK Frequency Failed!",
return -EINVAL);
*mclk_freq = mem_clk * 100;
return 0;
}
static int vega12_get_current_activity_percent(
struct pp_hwmgr *hwmgr,
int idx,
uint32_t *activity_percent)
{
SmuMetrics_t metrics_table;
int ret = 0;
ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);
if (ret)
return ret;
switch (idx) {
case AMDGPU_PP_SENSOR_GPU_LOAD:
*activity_percent = metrics_table.AverageGfxActivity;
break;
case AMDGPU_PP_SENSOR_MEM_LOAD:
*activity_percent = metrics_table.AverageUclkActivity;
break;
default:
pr_err("Invalid index for retrieving clock activity\n");
return -EINVAL;
}
Annotation
- Immediate include surface: `linux/delay.h`, `linux/module.h`, `linux/slab.h`, `hwmgr.h`, `amd_powerplay.h`, `vega12_smumgr.h`, `hardwaremanager.h`, `ppatomfwctrl.h`.
- Detected declarations: `function vega12_set_default_registry_data`, `function vega12_set_features_platform_caps`, `function vega12_init_dpm_defaults`, `function vega12_set_private_data_based_on_pptable`, `function vega12_hwmgr_backend_fini`, `function vega12_hwmgr_backend_init`, `function vega12_init_sclk_threshold`, `function vega12_setup_asic_task`, `function vega12_init_dpm_state`, `function vega12_override_pcie_parameters`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.