drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c- Extension
.c- Size
- 3636 bytes
- Lines
- 121
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu.hsoc15.hsoc15_hw_ip.hsoc15_common.hvega20_inc.hvega20_ppsmc.hvega20_baco.hvega20_smumgr.hamdgpu_ras.h
Detected Declarations
function vega20_get_bamaco_supportfunction vega20_baco_get_statefunction vega20_baco_set_statefunction vega20_baco_apply_vdci_flush_workaround
Annotated Snippet
if (!ras || !adev->ras_enabled) {
data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
data |= 0x80000000;
WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
if (smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_EnterBaco, 0, NULL))
return -EINVAL;
} else {
if (smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_EnterBaco, 1, NULL))
return -EINVAL;
}
} else if (state == BACO_STATE_OUT) {
if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ExitBaco, NULL))
return -EINVAL;
if (!soc15_baco_program_registers(hwmgr, clean_baco_tbl,
ARRAY_SIZE(clean_baco_tbl)))
return -EINVAL;
}
return 0;
}
int vega20_baco_apply_vdci_flush_workaround(struct pp_hwmgr *hwmgr)
{
int ret = 0;
ret = vega20_set_pptable_driver_address(hwmgr);
if (ret)
return ret;
return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_BacoWorkAroundFlushVDCI, NULL);
}
Annotation
- Immediate include surface: `amdgpu.h`, `soc15.h`, `soc15_hw_ip.h`, `soc15_common.h`, `vega20_inc.h`, `vega20_ppsmc.h`, `vega20_baco.h`, `vega20_smumgr.h`.
- Detected declarations: `function vega20_get_bamaco_support`, `function vega20_baco_get_state`, `function vega20_baco_set_state`, `function vega20_baco_apply_vdci_flush_workaround`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.