drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_pptable.h- Extension
.h- Size
- 5470 bytes
- Lines
- 140
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum ATOM_VEGA20_ODFEATURE_IDenum ATOM_VEGA20_ODSETTING_IDenum ATOM_VEGA20_PPCLOCK_ID
Annotated Snippet
#ifndef _VEGA20_PPTABLE_H_
#define _VEGA20_PPTABLE_H_
#pragma pack(push, 1)
#define ATOM_VEGA20_PP_THERMALCONTROLLER_NONE 0
#define ATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20 26
#define ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY 0x1
#define ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x2
#define ATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC 0x4
#define ATOM_VEGA20_PP_PLATFORM_CAP_BACO 0x8
#define ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO 0x10
#define ATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE 0x20
#define ATOM_VEGA20_TABLE_REVISION_VEGA20 11
#define ATOM_VEGA20_ODFEATURE_MAX_COUNT 32
#define ATOM_VEGA20_ODSETTING_MAX_COUNT 32
#define ATOM_VEGA20_PPCLOCK_MAX_COUNT 16
enum ATOM_VEGA20_ODFEATURE_ID {
ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS = 0,
ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE,
ATOM_VEGA20_ODFEATURE_UCLK_MAX,
ATOM_VEGA20_ODFEATURE_POWER_LIMIT,
ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT, //FanMaximumRpm
ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN, //FanMinimumPwm
ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN, //FanTargetTemperature
ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM, //MaxOpTemp
ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE,
ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL,
ATOM_VEGA20_ODFEATURE_COUNT,
};
enum ATOM_VEGA20_ODSETTING_ID {
ATOM_VEGA20_ODSETTING_GFXCLKFMAX = 0,
ATOM_VEGA20_ODSETTING_GFXCLKFMIN,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3,
ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3,
ATOM_VEGA20_ODSETTING_UCLKFMAX,
ATOM_VEGA20_ODSETTING_POWERPERCENTAGE,
ATOM_VEGA20_ODSETTING_FANRPMMIN,
ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT,
ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE,
ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX,
ATOM_VEGA20_ODSETTING_COUNT,
};
typedef enum ATOM_VEGA20_ODSETTING_ID ATOM_VEGA20_ODSETTING_ID;
typedef struct _ATOM_VEGA20_OVERDRIVE8_RECORD {
UCHAR ucODTableRevision;
ULONG ODFeatureCount;
UCHAR ODFeatureCapabilities[ATOM_VEGA20_ODFEATURE_MAX_COUNT]; //OD feature support flags
ULONG ODSettingCount;
ULONG ODSettingsMax[ATOM_VEGA20_ODSETTING_MAX_COUNT]; //Upper Limit for each OD Setting
ULONG ODSettingsMin[ATOM_VEGA20_ODSETTING_MAX_COUNT]; //Lower Limit for each OD Setting
} ATOM_VEGA20_OVERDRIVE8_RECORD;
enum ATOM_VEGA20_PPCLOCK_ID {
ATOM_VEGA20_PPCLOCK_GFXCLK = 0,
ATOM_VEGA20_PPCLOCK_VCLK,
ATOM_VEGA20_PPCLOCK_DCLK,
ATOM_VEGA20_PPCLOCK_ECLK,
ATOM_VEGA20_PPCLOCK_SOCCLK,
ATOM_VEGA20_PPCLOCK_UCLK,
ATOM_VEGA20_PPCLOCK_FCLK,
ATOM_VEGA20_PPCLOCK_DCEFCLK,
ATOM_VEGA20_PPCLOCK_DISPCLK,
ATOM_VEGA20_PPCLOCK_PIXCLK,
ATOM_VEGA20_PPCLOCK_PHYCLK,
ATOM_VEGA20_PPCLOCK_COUNT,
};
typedef enum ATOM_VEGA20_PPCLOCK_ID ATOM_VEGA20_PPCLOCK_ID;
typedef struct _ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD {
UCHAR ucTableRevision;
ULONG PowerSavingClockCount; // Count of PowerSavingClock Mode
ULONG PowerSavingClockMax[ATOM_VEGA20_PPCLOCK_MAX_COUNT]; // PowerSavingClock Mode Clock Maximum array In MHz
ULONG PowerSavingClockMin[ATOM_VEGA20_PPCLOCK_MAX_COUNT]; // PowerSavingClock Mode Clock Minimum array In MHz
} ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD;
typedef struct _ATOM_VEGA20_POWERPLAYTABLE {
struct atom_common_table_header sHeader;
UCHAR ucTableRevision;
USHORT usTableSize;
ULONG ulGoldenPPID;
Annotation
- Detected declarations: `enum ATOM_VEGA20_ODFEATURE_ID`, `enum ATOM_VEGA20_ODSETTING_ID`, `enum ATOM_VEGA20_PPCLOCK_ID`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.