drivers/gpu/drm/amd/pm/powerplay/inc/cz_ppsmc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/cz_ppsmc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/cz_ppsmc.h- Extension
.h- Size
- 8927 bytes
- Lines
- 187
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum FAN_CONTROLenum DPM_ARRAY
Annotated Snippet
#ifndef CZ_PP_SMC_H
#define CZ_PP_SMC_H
#pragma pack(push, 1)
/* Fan control algorithm:*/
#define FDO_MODE_HARDWARE 0
#define FDO_MODE_PIECE_WISE_LINEAR 1
enum FAN_CONTROL {
FAN_CONTROL_FUZZY,
FAN_CONTROL_TABLE
};
enum DPM_ARRAY {
DPM_ARRAY_HARD_MAX,
DPM_ARRAY_HARD_MIN,
DPM_ARRAY_SOFT_MAX,
DPM_ARRAY_SOFT_MIN
};
/*
* Return codes for driver to SMC communication.
* Leave these #define-s, enums might not be exactly 8-bits on the microcontroller.
*/
#define PPSMC_Result_OK ((uint16_t)0x01)
#define PPSMC_Result_NoMore ((uint16_t)0x02)
#define PPSMC_Result_NotNow ((uint16_t)0x03)
#define PPSMC_Result_Failed ((uint16_t)0xFF)
#define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
#define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
#define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
/*
* Supported driver messages
*/
#define PPSMC_MSG_Test ((uint16_t) 0x1)
#define PPSMC_MSG_GetFeatureStatus ((uint16_t) 0x2)
#define PPSMC_MSG_EnableAllSmuFeatures ((uint16_t) 0x3)
#define PPSMC_MSG_DisableAllSmuFeatures ((uint16_t) 0x4)
#define PPSMC_MSG_OptimizeBattery ((uint16_t) 0x5)
#define PPSMC_MSG_MaximizePerf ((uint16_t) 0x6)
#define PPSMC_MSG_UVDPowerOFF ((uint16_t) 0x7)
#define PPSMC_MSG_UVDPowerON ((uint16_t) 0x8)
#define PPSMC_MSG_VCEPowerOFF ((uint16_t) 0x9)
#define PPSMC_MSG_VCEPowerON ((uint16_t) 0xA)
#define PPSMC_MSG_ACPPowerOFF ((uint16_t) 0xB)
#define PPSMC_MSG_ACPPowerON ((uint16_t) 0xC)
#define PPSMC_MSG_SDMAPowerOFF ((uint16_t) 0xD)
#define PPSMC_MSG_SDMAPowerON ((uint16_t) 0xE)
#define PPSMC_MSG_XDMAPowerOFF ((uint16_t) 0xF)
#define PPSMC_MSG_XDMAPowerON ((uint16_t) 0x10)
#define PPSMC_MSG_SetMinDeepSleepSclk ((uint16_t) 0x11)
#define PPSMC_MSG_SetSclkSoftMin ((uint16_t) 0x12)
#define PPSMC_MSG_SetSclkSoftMax ((uint16_t) 0x13)
#define PPSMC_MSG_SetSclkHardMin ((uint16_t) 0x14)
#define PPSMC_MSG_SetSclkHardMax ((uint16_t) 0x15)
#define PPSMC_MSG_SetLclkSoftMin ((uint16_t) 0x16)
#define PPSMC_MSG_SetLclkSoftMax ((uint16_t) 0x17)
#define PPSMC_MSG_SetLclkHardMin ((uint16_t) 0x18)
#define PPSMC_MSG_SetLclkHardMax ((uint16_t) 0x19)
#define PPSMC_MSG_SetUvdSoftMin ((uint16_t) 0x1A)
#define PPSMC_MSG_SetUvdSoftMax ((uint16_t) 0x1B)
#define PPSMC_MSG_SetUvdHardMin ((uint16_t) 0x1C)
#define PPSMC_MSG_SetUvdHardMax ((uint16_t) 0x1D)
#define PPSMC_MSG_SetEclkSoftMin ((uint16_t) 0x1E)
#define PPSMC_MSG_SetEclkSoftMax ((uint16_t) 0x1F)
#define PPSMC_MSG_SetEclkHardMin ((uint16_t) 0x20)
#define PPSMC_MSG_SetEclkHardMax ((uint16_t) 0x21)
#define PPSMC_MSG_SetAclkSoftMin ((uint16_t) 0x22)
#define PPSMC_MSG_SetAclkSoftMax ((uint16_t) 0x23)
#define PPSMC_MSG_SetAclkHardMin ((uint16_t) 0x24)
#define PPSMC_MSG_SetAclkHardMax ((uint16_t) 0x25)
#define PPSMC_MSG_SetNclkSoftMin ((uint16_t) 0x26)
#define PPSMC_MSG_SetNclkSoftMax ((uint16_t) 0x27)
#define PPSMC_MSG_SetNclkHardMin ((uint16_t) 0x28)
#define PPSMC_MSG_SetNclkHardMax ((uint16_t) 0x29)
#define PPSMC_MSG_SetPstateSoftMin ((uint16_t) 0x2A)
#define PPSMC_MSG_SetPstateSoftMax ((uint16_t) 0x2B)
#define PPSMC_MSG_SetPstateHardMin ((uint16_t) 0x2C)
#define PPSMC_MSG_SetPstateHardMax ((uint16_t) 0x2D)
#define PPSMC_MSG_DisableLowMemoryPstate ((uint16_t) 0x2E)
#define PPSMC_MSG_EnableLowMemoryPstate ((uint16_t) 0x2F)
#define PPSMC_MSG_UcodeAddressLow ((uint16_t) 0x30)
#define PPSMC_MSG_UcodeAddressHigh ((uint16_t) 0x31)
#define PPSMC_MSG_UcodeLoadStatus ((uint16_t) 0x32)
#define PPSMC_MSG_DriverDramAddrHi ((uint16_t) 0x33)
#define PPSMC_MSG_DriverDramAddrLo ((uint16_t) 0x34)
#define PPSMC_MSG_CondExecDramAddrHi ((uint16_t) 0x35)
Annotation
- Detected declarations: `enum FAN_CONTROL`, `enum DPM_ARRAY`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.