drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h- Extension
.h- Size
- 29668 bytes
- Lines
- 833
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/seq_file.hamd_powerplay.hhardwaremanager.hhwmgr_ppt.hppatomctrl.hpower_state.hsmu_helper.h
Detected Declarations
struct pp_hwmgrstruct phm_fan_speed_infostruct pp_atomctrl_voltage_tablestruct vi_dpm_levelstruct vi_dpm_tablestruct phm_set_power_state_inputstruct phm_clock_arraystruct phm_clock_voltage_dependency_recordstruct phm_vceclock_voltage_dependency_recordstruct phm_uvdclock_voltage_dependency_recordstruct phm_samuclock_voltage_dependency_recordstruct phm_acpclock_voltage_dependency_recordstruct phm_clock_voltage_dependency_tablestruct phm_phase_shedding_limits_recordstruct phm_uvd_clock_voltage_dependency_recordstruct phm_uvd_clock_voltage_dependency_tablestruct phm_acp_clock_voltage_dependency_recordstruct phm_acp_clock_voltage_dependency_tablestruct phm_vce_clock_voltage_dependency_recordstruct phm_phase_shedding_limits_tablestruct phm_vceclock_voltage_dependency_tablestruct phm_uvdclock_voltage_dependency_tablestruct phm_samuclock_voltage_dependency_tablestruct phm_acpclock_voltage_dependency_tablestruct phm_vce_clock_voltage_dependency_tablestruct pp_smumgr_funcstruct pp_hwmgr_funcstruct pp_table_funcstruct phm_cac_leakage_tablestruct phm_samu_clock_voltage_dependency_recordstruct phm_samu_clock_voltage_dependency_tablestruct phm_cac_tdp_tablestruct phm_tdp_tablestruct phm_ppm_tablestruct phm_vq_budgeting_recordstruct phm_vq_budgeting_tablestruct phm_clock_and_voltage_limitsstruct phm_ppt_v1_informationstruct phm_ppt_v2_informationstruct phm_ppt_v3_informationstruct phm_dynamic_state_infostruct pp_fan_infostruct pp_advance_fan_control_parametersstruct pp_thermal_controller_infostruct phm_microcode_version_infostruct pp_hwmgrenum DISPLAY_GAPenum BACO_STATE
Annotated Snippet
struct vi_dpm_level {
bool enabled;
uint32_t value;
uint32_t param1;
};
struct vi_dpm_table {
uint32_t count;
struct vi_dpm_level dpm_level[];
};
#define PCIE_PERF_REQ_REMOVE_REGISTRY 0
#define PCIE_PERF_REQ_FORCE_LOWPOWER 1
#define PCIE_PERF_REQ_GEN1 2
#define PCIE_PERF_REQ_GEN2 3
#define PCIE_PERF_REQ_GEN3 4
enum PHM_BackEnd_Magic {
PHM_Dummy_Magic = 0xAA5555AA,
PHM_RV770_Magic = 0xDCBAABCD,
PHM_Kong_Magic = 0x239478DF,
PHM_NIslands_Magic = 0x736C494E,
PHM_Sumo_Magic = 0x8339FA11,
PHM_SIslands_Magic = 0x369431AC,
PHM_Trinity_Magic = 0x96751873,
PHM_CIslands_Magic = 0x38AC78B0,
PHM_Kv_Magic = 0xDCBBABC0,
PHM_VIslands_Magic = 0x20130307,
PHM_Cz_Magic = 0x67DCBA25,
PHM_Rv_Magic = 0x20161121
};
struct phm_set_power_state_input {
const struct pp_hw_power_state *pcurrent_state;
const struct pp_hw_power_state *pnew_state;
};
struct phm_clock_array {
uint32_t count;
uint32_t values[];
};
struct phm_clock_voltage_dependency_record {
uint32_t clk;
uint32_t v;
};
struct phm_vceclock_voltage_dependency_record {
uint32_t ecclk;
uint32_t evclk;
uint32_t v;
};
struct phm_uvdclock_voltage_dependency_record {
uint32_t vclk;
uint32_t dclk;
uint32_t v;
};
struct phm_samuclock_voltage_dependency_record {
uint32_t samclk;
uint32_t v;
};
struct phm_acpclock_voltage_dependency_record {
uint32_t acpclk;
uint32_t v;
};
struct phm_clock_voltage_dependency_table {
uint32_t count;
struct phm_clock_voltage_dependency_record entries[];
};
struct phm_phase_shedding_limits_record {
uint32_t Voltage;
uint32_t Sclk;
uint32_t Mclk;
};
struct phm_uvd_clock_voltage_dependency_record {
uint32_t vclk;
uint32_t dclk;
uint32_t v;
};
struct phm_uvd_clock_voltage_dependency_table {
uint8_t count;
struct phm_uvd_clock_voltage_dependency_record entries[];
};
Annotation
- Immediate include surface: `linux/seq_file.h`, `amd_powerplay.h`, `hardwaremanager.h`, `hwmgr_ppt.h`, `ppatomctrl.h`, `power_state.h`, `smu_helper.h`.
- Detected declarations: `struct pp_hwmgr`, `struct phm_fan_speed_info`, `struct pp_atomctrl_voltage_table`, `struct vi_dpm_level`, `struct vi_dpm_table`, `struct phm_set_power_state_input`, `struct phm_clock_array`, `struct phm_clock_voltage_dependency_record`, `struct phm_vceclock_voltage_dependency_record`, `struct phm_uvdclock_voltage_dependency_record`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.