drivers/gpu/drm/amd/pm/powerplay/inc/smu_ucode_xfer_cz.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smu_ucode_xfer_cz.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smu_ucode_xfer_cz.h- Extension
.h- Size
- 6017 bytes
- Lines
- 170
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct SMU_Taskstruct TOCstruct SMU_MetaData_Mode0struct SMU_MetaData_Mode1struct SMU_MetaData_Mode2struct SMU_MetaData_Mode3
Annotated Snippet
struct SMU_Task {
uint8_t type;
uint8_t arg;
uint16_t next;
data_64_t addr;
uint32_t size_bytes;
};
typedef struct SMU_Task SMU_Task;
struct TOC {
uint8_t JobList[NUM_JOBLIST_ENTRIES];
SMU_Task tasks[];
};
// META DATA COMMAND Definitions
#define METADATA_CMD_MODE0 0x00000103
#define METADATA_CMD_MODE1 0x00000113
#define METADATA_CMD_MODE2 0x00000123
#define METADATA_CMD_MODE3 0x00000133
#define METADATA_CMD_DELAY 0x00000203
#define METADATA_CMD_CHNG_REGSPACE 0x00000303
#define METADATA_PERFORM_ON_SAVE 0x00001000
#define METADATA_PERFORM_ON_LOAD 0x00002000
#define METADATA_CMD_ARG_MASK 0xFFFF0000
#define METADATA_CMD_ARG_SHIFT 16
// Simple register addr/data fields
struct SMU_MetaData_Mode0 {
uint32_t register_address;
uint32_t register_data;
};
typedef struct SMU_MetaData_Mode0 SMU_MetaData_Mode0;
// Register addr/data with mask
struct SMU_MetaData_Mode1 {
uint32_t register_address;
uint32_t register_mask;
uint32_t register_data;
};
typedef struct SMU_MetaData_Mode1 SMU_MetaData_Mode1;
struct SMU_MetaData_Mode2 {
uint32_t register_address;
uint32_t register_mask;
uint32_t target_value;
};
typedef struct SMU_MetaData_Mode2 SMU_MetaData_Mode2;
// Always write data (even on a save operation)
struct SMU_MetaData_Mode3 {
uint32_t register_address;
uint32_t register_mask;
uint32_t register_data;
};
typedef struct SMU_MetaData_Mode3 SMU_MetaData_Mode3;
#endif
Annotation
- Detected declarations: `struct SMU_Task`, `struct TOC`, `struct SMU_MetaData_Mode0`, `struct SMU_MetaData_Mode1`, `struct SMU_MetaData_Mode2`, `struct SMU_MetaData_Mode3`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.