drivers/gpu/drm/amd/pm/powerplay/inc/smu7_discrete.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/pm/powerplay/inc/smu7_discrete.h

Extension

.h

Size

15452 bytes

Lines

516

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• smu7.h

Detected Declarations

• struct SMU7_SoftRegisters
• struct SMU7_Discrete_VoltageLevel
• struct SMU7_Discrete_GraphicsLevel
• struct SMU7_Discrete_ACPILevel
• struct SMU7_Discrete_Ulv
• struct SMU7_Discrete_MemoryLevel
• struct SMU7_Discrete_LinkLevel
• struct SMU7_Discrete_MCArbDramTimingTableEntry
• struct SMU7_Discrete_MCArbDramTimingTable
• struct SMU7_Discrete_UvdLevel
• struct SMU7_Discrete_ExtClkLevel
• struct SMU7_Discrete_StateInfo
• struct SMU7_Discrete_DpmTable
• struct SMU7_Discrete_MCRegisterAddress
• struct SMU7_Discrete_MCRegisterSet
• struct SMU7_Discrete_MCRegisters
• struct SMU7_Discrete_FanTable
• struct SMU7_Discrete_PmFuses

Annotated Snippet

struct SMU7_Discrete_PmFuses {
  // dw0-dw1
  uint8_t BapmVddCVidHiSidd[8];

  // dw2-dw3
  uint8_t BapmVddCVidLoSidd[8];

  // dw4-dw5
  uint8_t VddCVid[8];

  // dw6
  uint8_t SviLoadLineEn;
  uint8_t SviLoadLineVddC;
  uint8_t SviLoadLineTrimVddC;
  uint8_t SviLoadLineOffsetVddC;

  // dw7
  uint16_t TDC_VDDC_PkgLimit;
  uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
  uint8_t TDC_MAWt;

  // dw8
  uint8_t TdcWaterfallCtl;
  uint8_t LPMLTemperatureMin;
  uint8_t LPMLTemperatureMax;
  uint8_t Reserved;

  // dw9-dw10
  uint8_t BapmVddCVidHiSidd2[8];

  // dw11-dw12
  int16_t FuzzyFan_ErrorSetDelta;
  int16_t FuzzyFan_ErrorRateSetDelta;
  int16_t FuzzyFan_PwmSetDelta;
  uint16_t CalcMeasPowerBlend;

  // dw13-dw16
  uint8_t GnbLPML[16];

  // dw17
  uint8_t GnbLPMLMaxVid;
  uint8_t GnbLPMLMinVid;
  uint8_t Reserved1[2];

  // dw18
  uint16_t BapmVddCBaseLeakageHiSidd;
  uint16_t BapmVddCBaseLeakageLoSidd;
};

typedef struct SMU7_Discrete_PmFuses SMU7_Discrete_PmFuses;


#pragma pack(pop)

#endif

Annotation

• Immediate include surface: `smu7.h`.
• Detected declarations: `struct SMU7_SoftRegisters`, `struct SMU7_Discrete_VoltageLevel`, `struct SMU7_Discrete_GraphicsLevel`, `struct SMU7_Discrete_ACPILevel`, `struct SMU7_Discrete_Ulv`, `struct SMU7_Discrete_MemoryLevel`, `struct SMU7_Discrete_LinkLevel`, `struct SMU7_Discrete_MCArbDramTimingTableEntry`, `struct SMU7_Discrete_MCArbDramTimingTable`, `struct SMU7_Discrete_UvdLevel`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.