drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h- Extension
.h- Size
- 8830 bytes
- Lines
- 291
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smu7.h
Detected Declarations
struct SMU7_SoftRegistersstruct SMU7_Fusion_GraphicsLevelstruct SMU7_Fusion_GIOLevelstruct SMU7_Fusion_UvdLevelstruct SMU7_Fusion_ExtClkLevelstruct SMU7_Fusion_ACPILevelstruct SMU7_Fusion_NbDpmstruct SMU7_Fusion_StateInfostruct SMU7_Fusion_DpmTablestruct SMU7_Fusion_GIODpmTable
Annotated Snippet
struct SMU7_SoftRegisters {
uint32_t RefClockFrequency;
uint32_t PmTimerP;
uint32_t FeatureEnables;
uint32_t HandshakeDisables;
uint8_t DisplayPhy1Config;
uint8_t DisplayPhy2Config;
uint8_t DisplayPhy3Config;
uint8_t DisplayPhy4Config;
uint8_t DisplayPhy5Config;
uint8_t DisplayPhy6Config;
uint8_t DisplayPhy7Config;
uint8_t DisplayPhy8Config;
uint32_t AverageGraphicsA;
uint32_t AverageMemoryA;
uint32_t AverageGioA;
uint8_t SClkDpmEnabledLevels;
uint8_t MClkDpmEnabledLevels;
uint8_t LClkDpmEnabledLevels;
uint8_t PCIeDpmEnabledLevels;
uint8_t UVDDpmEnabledLevels;
uint8_t SAMUDpmEnabledLevels;
uint8_t ACPDpmEnabledLevels;
uint8_t VCEDpmEnabledLevels;
uint32_t DRAM_LOG_ADDR_H;
uint32_t DRAM_LOG_ADDR_L;
uint32_t DRAM_LOG_PHY_ADDR_H;
uint32_t DRAM_LOG_PHY_ADDR_L;
uint32_t DRAM_LOG_BUFF_SIZE;
uint32_t UlvEnterC;
uint32_t UlvTime;
uint32_t Reserved[3];
};
typedef struct SMU7_SoftRegisters SMU7_SoftRegisters;
struct SMU7_Fusion_GraphicsLevel {
uint32_t MinVddNb;
uint32_t SclkFrequency;
uint8_t Vid;
uint8_t VidOffset;
uint16_t AT;
uint8_t PowerThrottle;
uint8_t GnbSlow;
uint8_t ForceNbPs1;
uint8_t SclkDid;
uint8_t DisplayWatermark;
uint8_t EnabledForActivity;
uint8_t EnabledForThrottle;
uint8_t UpH;
uint8_t DownH;
uint8_t VoltageDownH;
uint8_t DeepSleepDivId;
uint8_t ClkBypassCntl;
uint32_t reserved;
};
typedef struct SMU7_Fusion_GraphicsLevel SMU7_Fusion_GraphicsLevel;
struct SMU7_Fusion_GIOLevel {
uint8_t EnabledForActivity;
uint8_t LclkDid;
uint8_t Vid;
uint8_t VoltageDownH;
uint32_t MinVddNb;
uint16_t ResidencyCounter;
uint8_t UpH;
uint8_t DownH;
uint32_t LclkFrequency;
uint8_t ActivityLevel;
uint8_t EnabledForThrottle;
Annotation
- Immediate include surface: `smu7.h`.
- Detected declarations: `struct SMU7_SoftRegisters`, `struct SMU7_Fusion_GraphicsLevel`, `struct SMU7_Fusion_GIOLevel`, `struct SMU7_Fusion_UvdLevel`, `struct SMU7_Fusion_ExtClkLevel`, `struct SMU7_Fusion_ACPILevel`, `struct SMU7_Fusion_NbDpm`, `struct SMU7_Fusion_StateInfo`, `struct SMU7_Fusion_DpmTable`, `struct SMU7_Fusion_GIODpmTable`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.