drivers/gpu/drm/amd/pm/powerplay/inc/smu71.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smu71.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smu71.h
Extension
.h
Size
14145 bytes
Lines
505
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct SMU71_PIDController {
    uint32_t Ki;
    int32_t LFWindupUpperLim;
    int32_t LFWindupLowerLim;
    uint32_t StatePrecision;
    uint32_t LfPrecision;
    uint32_t LfOffset;
    uint32_t MaxState;
    uint32_t MaxLfFraction;
    uint32_t StateShift;
};

typedef struct SMU71_PIDController SMU71_PIDController;

struct SMU7_LocalDpmScoreboard {
    uint32_t PercentageBusy;

    int32_t  PIDError;
    int32_t  PIDIntegral;
    int32_t  PIDOutput;

    uint32_t SigmaDeltaAccum;
    uint32_t SigmaDeltaOutput;
    uint32_t SigmaDeltaLevel;

    uint32_t UtilizationSetpoint;

    uint8_t  TdpClampMode;
    uint8_t  TdcClampMode;
    uint8_t  ThermClampMode;
    uint8_t  VoltageBusy;

    int8_t   CurrLevel;
    int8_t   TargLevel;
    uint8_t  LevelChangeInProgress;
    uint8_t  UpHyst;

    uint8_t  DownHyst;
    uint8_t  VoltageDownHyst;
    uint8_t  DpmEnable;
    uint8_t  DpmRunning;

    uint8_t  DpmForce;
    uint8_t  DpmForceLevel;
    uint8_t  DisplayWatermark;
    uint8_t  McArbIndex;

    uint32_t MinimumPerfSclk;

    uint8_t  AcpiReq;
    uint8_t  AcpiAck;
    uint8_t  GfxClkSlow;
    uint8_t  GpioClampMode;

    uint8_t  FpsFilterWeight;
    uint8_t  EnabledLevelsChange;
    uint8_t  DteClampMode;
    uint8_t  FpsClampMode;

    uint16_t LevelResidencyCounters[SMU71_MAX_LEVELS_GRAPHICS];
    uint16_t LevelSwitchCounters[SMU71_MAX_LEVELS_GRAPHICS];

    void     (*TargetStateCalculator)(uint8_t);
    void     (*SavedTargetStateCalculator)(uint8_t);

    uint16_t AutoDpmInterval;
    uint16_t AutoDpmRange;

    uint8_t  FpsEnabled;
    uint8_t  MaxPerfLevel;
    uint8_t  AllowLowClkInterruptToHost;
    uint8_t  FpsRunning;

    uint32_t MaxAllowedFrequency;
};

typedef struct SMU7_LocalDpmScoreboard SMU7_LocalDpmScoreboard;

#define SMU7_MAX_VOLTAGE_CLIENTS 12

struct SMU7_VoltageScoreboard {
    uint16_t CurrentVoltage;
    uint16_t HighestVoltage;
    uint16_t MaxVid;
    uint8_t  HighestVidOffset;
    uint8_t  CurrentVidOffset;
#if defined (SMU__DGPU_ONLY)
    uint8_t  CurrentPhases;
    uint8_t  HighestPhases;
#else

Annotation

Implementation Notes