drivers/gpu/drm/amd/pm/powerplay/inc/smu74_discrete.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smu74_discrete.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smu74_discrete.h- Extension
.h- Size
- 23120 bytes
- Lines
- 851
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smu74.h
Detected Declarations
struct sclkFcwRange_tstruct SMIO_Patternstruct SMIO_Tablestruct SMU_SclkSettingstruct SMU74_Discrete_GraphicsLevelstruct SMU74_Discrete_ACPILevelstruct SMU74_Discrete_Ulvstruct SMU74_Discrete_MemoryLevelstruct SMU74_Discrete_LinkLevelstruct SMU74_Discrete_MCArbDramTimingTableEntrystruct SMU74_Discrete_MCArbDramTimingTablestruct SMU74_Discrete_UvdLevelstruct SMU74_Discrete_ExtClkLevelstruct SMU74_Discrete_StateInfostruct SMU_QuadraticCoeffsstruct SMU74_Discrete_DpmTablestruct SMU74_Discrete_FanTablestruct SMU7_MclkDpmScoreboardstruct SMU7_UlvScoreboardstruct VddgfxSavedRegistersstruct SMU7_VddGfxScoreboardstruct SMU7_TdcLimitScoreboardstruct SMU7_PkgPwrLimitScoreboardstruct SMU7_BapmScoreboardstruct SMU7_AcpiScoreboardstruct SMU74_Discrete_PmFusesstruct SMU7_Discrete_Log_Header_Tablestruct SMU7_Discrete_Log_Cntlstruct SMU7_Discrete_Cac_Collection_Tablestruct SMU7_Discrete_Cac_Verification_Tablestruct SMU7_Discrete_Pm_Status_Tablestruct SMU7_GfxCuPgScoreboard
Annotated Snippet
struct sclkFcwRange_t {
uint8_t vco_setting;
uint8_t postdiv;
uint16_t fcw_pcc;
uint16_t fcw_trans_upper;
uint16_t fcw_trans_lower;
};
typedef struct sclkFcwRange_t sclkFcwRange_t;
struct SMIO_Pattern {
uint16_t Voltage;
uint8_t Smio;
uint8_t padding;
};
typedef struct SMIO_Pattern SMIO_Pattern;
struct SMIO_Table {
SMIO_Pattern Pattern[SMU_MAX_SMIO_LEVELS];
};
typedef struct SMIO_Table SMIO_Table;
struct SMU_SclkSetting {
uint32_t SclkFrequency;
uint16_t Fcw_int;
uint16_t Fcw_frac;
uint16_t Pcc_fcw_int;
uint8_t PllRange;
uint8_t SSc_En;
uint16_t Sclk_slew_rate;
uint16_t Pcc_up_slew_rate;
uint16_t Pcc_down_slew_rate;
uint16_t Fcw1_int;
uint16_t Fcw1_frac;
uint16_t Sclk_ss_slew_rate;
};
typedef struct SMU_SclkSetting SMU_SclkSetting;
struct SMU74_Discrete_GraphicsLevel {
SMU_VoltageLevel MinVoltage;
uint8_t pcieDpmLevel;
uint8_t DeepSleepDivId;
uint16_t ActivityLevel;
uint32_t CgSpllFuncCntl3;
uint32_t CgSpllFuncCntl4;
uint32_t CcPwrDynRm;
uint32_t CcPwrDynRm1;
uint8_t SclkDid;
uint8_t padding;
uint8_t EnabledForActivity;
uint8_t EnabledForThrottle;
uint8_t UpHyst;
uint8_t DownHyst;
uint8_t VoltageDownHyst;
uint8_t PowerThrottle;
SMU_SclkSetting SclkSetting;
};
typedef struct SMU74_Discrete_GraphicsLevel SMU74_Discrete_GraphicsLevel;
struct SMU74_Discrete_ACPILevel {
uint32_t Flags;
SMU_VoltageLevel MinVoltage;
uint32_t SclkFrequency;
uint8_t SclkDid;
uint8_t DisplayWatermark;
uint8_t DeepSleepDivId;
uint8_t padding;
uint32_t CcPwrDynRm;
uint32_t CcPwrDynRm1;
SMU_SclkSetting SclkSetting;
};
typedef struct SMU74_Discrete_ACPILevel SMU74_Discrete_ACPILevel;
struct SMU74_Discrete_Ulv {
uint32_t CcPwrDynRm;
uint32_t CcPwrDynRm1;
uint16_t VddcOffset;
uint8_t VddcOffsetVid;
uint8_t VddcPhase;
uint16_t BifSclkDfs;
uint16_t Reserved;
};
typedef struct SMU74_Discrete_Ulv SMU74_Discrete_Ulv;
Annotation
- Immediate include surface: `smu74.h`.
- Detected declarations: `struct sclkFcwRange_t`, `struct SMIO_Pattern`, `struct SMIO_Table`, `struct SMU_SclkSetting`, `struct SMU74_Discrete_GraphicsLevel`, `struct SMU74_Discrete_ACPILevel`, `struct SMU74_Discrete_Ulv`, `struct SMU74_Discrete_MemoryLevel`, `struct SMU74_Discrete_LinkLevel`, `struct SMU74_Discrete_MCArbDramTimingTableEntry`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.