drivers/gpu/drm/amd/pm/powerplay/inc/smu8_fusion.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smu8_fusion.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smu8_fusion.h- Extension
.h- Size
- 4173 bytes
- Lines
- 136
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smu8.h
Detected Declarations
struct SMU8_GfxCuPgScoreboardstruct SMU8_Port80MonitorTablestruct SMU8_Fusion_ClkLevelstruct SMU8_Fusion_SclkBreakdownTablestruct SMU8_Fusion_LclkBreakdownTablestruct SMU8_Fusion_EclkBreakdownTablestruct SMU8_Fusion_VclkBreakdownTablestruct SMU8_Fusion_DclkBreakdownTablestruct SMU8_Fusion_AclkBreakdownTablestruct SMU8_Fusion_ClkTable
Annotated Snippet
struct SMU8_GfxCuPgScoreboard {
uint8_t Enabled;
uint8_t spare[3];
};
struct SMU8_Port80MonitorTable {
uint32_t MmioAddress;
uint32_t MemoryBaseHi;
uint32_t MemoryBaseLo;
uint16_t MemoryBufferSize;
uint16_t MemoryPosition;
uint16_t PollingInterval;
uint8_t EnableCsrShadow;
uint8_t EnableDramShadow;
};
/* Display specific power management parameters */
#define PWRMGT_SEPARATION_TIME_SHIFT 0
#define PWRMGT_SEPARATION_TIME_MASK 0xFFFF
#define PWRMGT_DISABLE_CPU_CSTATES_SHIFT 16
#define PWRMGT_DISABLE_CPU_CSTATES_MASK 0x1
#define PWRMGT_DISABLE_CPU_PSTATES_SHIFT 24
#define PWRMGT_DISABLE_CPU_PSTATES_MASK 0x1
/* Clock Table Definitions */
#define NUM_SCLK_LEVELS 8
#define NUM_LCLK_LEVELS 8
#define NUM_UVD_LEVELS 8
#define NUM_ECLK_LEVELS 8
#define NUM_ACLK_LEVELS 8
struct SMU8_Fusion_ClkLevel {
uint8_t GnbVid;
uint8_t GfxVid;
uint8_t DfsDid;
uint8_t DeepSleepDid;
uint32_t DfsBypass;
uint32_t Frequency;
};
struct SMU8_Fusion_SclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
/* SMU8_Fusion_ClkLevel PwrOffLevel; */
uint32_t SclkValidMask;
uint32_t MaxSclkIndex;
};
struct SMU8_Fusion_LclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
/* SMU8_Fusion_ClkLevel PwrOffLevel; */
uint32_t LclkValidMask;
uint32_t MaxLclkIndex;
};
struct SMU8_Fusion_EclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
struct SMU8_Fusion_ClkLevel PwrOffLevel;
uint32_t EclkValidMask;
uint32_t MaxEclkIndex;
};
struct SMU8_Fusion_VclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
struct SMU8_Fusion_ClkLevel PwrOffLevel;
uint32_t VclkValidMask;
uint32_t MaxVclkIndex;
};
struct SMU8_Fusion_DclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
struct SMU8_Fusion_ClkLevel PwrOffLevel;
uint32_t DclkValidMask;
uint32_t MaxDclkIndex;
};
struct SMU8_Fusion_AclkBreakdownTable {
struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
struct SMU8_Fusion_ClkLevel DpmOffLevel;
struct SMU8_Fusion_ClkLevel PwrOffLevel;
uint32_t AclkValidMask;
uint32_t MaxAclkIndex;
};
struct SMU8_Fusion_ClkTable {
Annotation
- Immediate include surface: `smu8.h`.
- Detected declarations: `struct SMU8_GfxCuPgScoreboard`, `struct SMU8_Port80MonitorTable`, `struct SMU8_Fusion_ClkLevel`, `struct SMU8_Fusion_SclkBreakdownTable`, `struct SMU8_Fusion_LclkBreakdownTable`, `struct SMU8_Fusion_EclkBreakdownTable`, `struct SMU8_Fusion_VclkBreakdownTable`, `struct SMU8_Fusion_DclkBreakdownTable`, `struct SMU8_Fusion_AclkBreakdownTable`, `struct SMU8_Fusion_ClkTable`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.