drivers/gpu/drm/amd/pm/powerplay/inc/smumgr.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/powerplay/inc/smumgr.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/powerplay/inc/smumgr.h- Extension
.h- Size
- 3620 bytes
- Lines
- 119
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hamd_powerplay.hhwmgr.h
Detected Declarations
enum SMU_TABLEenum SMU_TYPEenum SMU_MEMBERenum SMU_MAC_DEFINITIONenum SMU9_TABLE_IDenum SMU10_TABLE_ID
Annotated Snippet
#ifndef _SMUMGR_H_
#define _SMUMGR_H_
#include <linux/types.h>
#include "amd_powerplay.h"
#include "hwmgr.h"
enum SMU_TABLE {
SMU_UVD_TABLE = 0,
SMU_VCE_TABLE,
SMU_BIF_TABLE,
};
enum SMU_TYPE {
SMU_SoftRegisters = 0,
SMU_Discrete_DpmTable,
};
enum SMU_MEMBER {
HandshakeDisables = 0,
VoltageChangeTimeout,
AverageGraphicsActivity,
AverageMemoryActivity,
PreVBlankGap,
VBlankTimeout,
UcodeLoadStatus,
UvdBootLevel,
VceBootLevel,
LowSclkInterruptThreshold,
DRAM_LOG_ADDR_H,
DRAM_LOG_ADDR_L,
DRAM_LOG_PHY_ADDR_H,
DRAM_LOG_PHY_ADDR_L,
DRAM_LOG_BUFF_SIZE,
};
enum SMU_MAC_DEFINITION {
SMU_MAX_LEVELS_GRAPHICS = 0,
SMU_MAX_LEVELS_MEMORY,
SMU_MAX_LEVELS_LINK,
SMU_MAX_ENTRIES_SMIO,
SMU_MAX_LEVELS_VDDC,
SMU_MAX_LEVELS_VDDGFX,
SMU_MAX_LEVELS_VDDCI,
SMU_MAX_LEVELS_MVDD,
SMU_UVD_MCLK_HANDSHAKE_DISABLE,
};
enum SMU9_TABLE_ID {
PPTABLE = 0,
WMTABLE,
AVFSTABLE,
TOOLSTABLE,
AVFSFUSETABLE
};
enum SMU10_TABLE_ID {
SMU10_WMTABLE = 0,
SMU10_CLOCKTABLE,
};
extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp);
extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
uint16_t msg, uint32_t parameter,
uint32_t *resp);
extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
uint32_t type, uint32_t member);
extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
Annotation
- Immediate include surface: `linux/types.h`, `amd_powerplay.h`, `hwmgr.h`.
- Detected declarations: `enum SMU_TABLE`, `enum SMU_TYPE`, `enum SMU_MEMBER`, `enum SMU_MAC_DEFINITION`, `enum SMU9_TABLE_ID`, `enum SMU10_TABLE_ID`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.