drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c- Extension
.c- Size
- 107310 bytes
- Lines
- 4188
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hlinux/pci.hlinux/power_supply.hlinux/reboot.hamdgpu.hamdgpu_smu.hsmu_internal.hatom.harcturus_ppt.hnavi10_ppt.hsienna_cichlid_ppt.hrenoir_ppt.hvangogh_ppt.haldebaran_ppt.hyellow_carp_ppt.hcyan_skillfish_ppt.hsmu_v13_0_0_ppt.hsmu_v13_0_4_ppt.hsmu_v13_0_5_ppt.hsmu_v13_0_6_ppt.hsmu_v13_0_7_ppt.hsmu_v14_0_0_ppt.hsmu_v14_0_2_ppt.hsmu_v15_0_0_ppt.hsmu_v15_0_8_ppt.hamd_pcie.h
Detected Declarations
function smu_sys_get_pp_feature_maskfunction smu_sys_set_pp_feature_maskfunction smu_set_residency_gfxofffunction smu_get_residency_gfxofffunction smu_get_entrycount_gfxofffunction smu_get_status_gfxofffunction smu_set_soft_freq_rangefunction smu_get_dpm_freq_rangefunction smu_set_gfx_power_up_by_imufunction smu_get_mclkfunction smu_get_sclkfunction smu_set_gfx_imu_enablefunction is_vcn_enabledfunction smu_dpm_set_vcn_enablefunction smu_dpm_set_jpeg_enablefunction smu_dpm_set_vpe_enablefunction smu_dpm_set_isp_enablefunction smu_dpm_set_umsch_mm_enablefunction smu_set_mall_enablefunction smu_dpm_set_power_gatefunction smu_set_user_clk_dependenciesfunction smu_restore_dpm_user_profilefunction smu_get_power_num_statesfunction is_support_sw_smufunction is_support_cclk_dpmfunction amdgpu_smu_ras_send_msgfunction amdgpu_smu_ras_feature_is_enabledfunction smu_sys_get_pp_tablefunction smu_sys_set_pp_tablefunction smu_init_driver_allowed_feature_maskfunction smu_set_funcsfunction smu_early_initfunction smu_set_default_dpm_tablefunction smu_apply_default_config_table_settingsfunction smu_late_initfunction smu_init_fb_allocationsfunction smu_fini_fb_allocationsfunction smu_update_gpu_addressesfunction smu_alloc_memory_poolfunction smu_free_memory_poolfunction smu_alloc_dummy_read_tablefunction smu_free_dummy_read_tablefunction smu_smc_table_sw_initfunction smu_smc_table_sw_finifunction smu_throttling_logging_work_fnfunction smu_interrupt_work_fnfunction smu_swctf_delayed_work_handlerfunction smu_init_xgmi_plpd_mode
Annotated Snippet
static const struct file_operations smu_stb_debugfs_fops = {
.owner = THIS_MODULE,
.open = smu_stb_debugfs_open,
.read = smu_stb_debugfs_read,
.release = smu_stb_debugfs_release,
.llseek = default_llseek,
};
#endif
void amdgpu_smu_stb_debug_fs_init(struct amdgpu_device *adev)
{
#if defined(CONFIG_DEBUG_FS)
struct smu_context *smu = adev->powerplay.pp_handle;
if (!smu || (!smu->stb_context.stb_buf_size))
return;
debugfs_create_file_size("amdgpu_smu_stb_dump",
S_IRUSR,
adev_to_drm(adev)->primary->debugfs_root,
adev,
&smu_stb_debugfs_fops,
smu->stb_context.stb_buf_size);
#endif
}
int smu_send_hbm_bad_pages_num(struct smu_context *smu, uint32_t size)
{
int ret = 0;
if (smu->ppt_funcs && smu->ppt_funcs->send_hbm_bad_pages_num)
ret = smu->ppt_funcs->send_hbm_bad_pages_num(smu, size);
return ret;
}
int smu_send_hbm_bad_channel_flag(struct smu_context *smu, uint32_t size)
{
int ret = 0;
if (smu->ppt_funcs && smu->ppt_funcs->send_hbm_bad_channel_flag)
ret = smu->ppt_funcs->send_hbm_bad_channel_flag(smu, size);
return ret;
}
int smu_send_rma_reason(struct smu_context *smu)
{
int ret = 0;
if (smu->ppt_funcs && smu->ppt_funcs->send_rma_reason)
ret = smu->ppt_funcs->send_rma_reason(smu);
return ret;
}
/**
* smu_reset_sdma_is_supported - Check if SDMA reset is supported by SMU
* @smu: smu_context pointer
*
* This function checks if the SMU supports resetting the SDMA engine.
* It returns true if supported, false otherwise.
*/
bool smu_reset_sdma_is_supported(struct smu_context *smu)
{
return smu_feature_cap_test(smu, SMU_FEATURE_CAP_ID__SDMA_RESET);
}
int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask)
{
int ret = 0;
if (smu->ppt_funcs && smu->ppt_funcs->reset_sdma)
ret = smu->ppt_funcs->reset_sdma(smu, inst_mask);
return ret;
}
bool smu_reset_vcn_is_supported(struct smu_context *smu)
{
return smu_feature_cap_test(smu, SMU_FEATURE_CAP_ID__VCN_RESET);
}
int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask)
{
if (smu->ppt_funcs && smu->ppt_funcs->dpm_reset_vcn)
smu->ppt_funcs->dpm_reset_vcn(smu, inst_mask);
Annotation
- Immediate include surface: `linux/firmware.h`, `linux/pci.h`, `linux/power_supply.h`, `linux/reboot.h`, `amdgpu.h`, `amdgpu_smu.h`, `smu_internal.h`, `atom.h`.
- Detected declarations: `function smu_sys_get_pp_feature_mask`, `function smu_sys_set_pp_feature_mask`, `function smu_set_residency_gfxoff`, `function smu_get_residency_gfxoff`, `function smu_get_entrycount_gfxoff`, `function smu_get_status_gfxoff`, `function smu_set_soft_freq_range`, `function smu_get_dpm_freq_range`, `function smu_set_gfx_power_up_by_imu`, `function smu_get_mclk`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.