drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v15_0_0_pmfw.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v15_0_0_pmfw.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v15_0_0_pmfw.h- Extension
.h- Size
- 6219 bytes
- Lines
- 161
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smu15_driver_if_v15_0_0.h
Detected Declarations
struct SMU_Firmware_Footer
Annotated Snippet
struct SMU_Firmware_Footer {
uint32_t Signature;
};
typedef struct SMU_Firmware_Footer SMU_Firmware_Footer;
// PSP3.0 Header Definition
typedef struct {
uint32_t ImageVersion;
uint32_t ImageVersion2; // This is repeated because DW0 cannot be written in SRAM due to HW bug.
uint32_t Padding0[3];
uint32_t SizeFWSigned;
uint32_t Padding1[25];
uint32_t FirmwareType;
uint32_t Filler[32];
} SMU_Firmware_Header;
typedef struct {
// MP1_EXT_SCRATCH0
uint32_t DpmHandlerID : 8;
uint32_t ActivityMonitorID : 8;
uint32_t DpmTimerID : 8;
uint32_t DpmHubID : 4;
uint32_t DpmHubTask : 4;
// MP1_EXT_SCRATCH1
uint32_t CclkSyncStatus : 8;
uint32_t Ccx0CpuOff : 2;
uint32_t Ccx1CpuOff : 2;
uint32_t Ccx2CpuOff : 2;
uint32_t GfxOffStatus : 2;
uint32_t VddOff : 1;
uint32_t InWhisperMode : 1;
uint32_t ZstateStatus : 4;
uint32_t DcnIps2Status : 2;
uint32_t DstateFun : 4;
uint32_t DstateDev : 4;
// MP1_EXT_SCRATCH2
uint32_t P2JobHandler :24;
uint32_t RsmuPmiP2PendingCnt : 8;
// MP1_EXT_SCRATCH3
uint32_t PostCode :32;
// MP1_EXT_SCRATCH4
uint32_t MsgPortBusy :24;
uint32_t RsmuPmiP1Pending : 1;
uint32_t DfCstateExitPending : 1;
uint32_t Ccx0Pc6ExitPending : 1;
uint32_t Ccx1Pc6ExitPending : 1;
uint32_t Ccx2Pc6ExitPending : 1;
uint32_t WarmResetPending : 1;
uint32_t spare1 : 2;
// MP1_EXT_SCRATCH5
uint32_t IdleMask :32;
// MP1_EXT_SCRATCH6 = RTOS threads' status
// MP1_EXT_SCRATCH7 = RTOS Current Job
} FwStatus_t;
#pragma pack(pop)
#endif
Annotation
- Immediate include surface: `smu15_driver_if_v15_0_0.h`.
- Detected declarations: `struct SMU_Firmware_Footer`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.