drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0_7_pptable.h
Extension
.h
Size
10414 bytes
Lines
199
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct smu_13_0_7_overdrive_table {
    uint8_t revision;                             //Revision = SMU_13_0_7_PP_OVERDRIVE_VERSION
    uint8_t reserve[3];                           //Zero filled field reserved for future use
    uint32_t feature_count;                       //Total number of supported features
    uint32_t setting_count;                       //Total number of supported settings
    uint8_t cap[SMU_13_0_7_MAX_ODFEATURE];        //OD feature support flags
    uint32_t max[SMU_13_0_7_MAX_ODSETTING];       //default maximum settings
    uint32_t min[SMU_13_0_7_MAX_ODSETTING];       //default minimum settings
    int16_t pm_setting[SMU_13_0_7_MAX_PMSETTING]; //Optimized power mode feature settings
};

enum SMU_13_0_7_PPCLOCK_ID {
    SMU_13_0_7_PPCLOCK_GFXCLK = 0,
    SMU_13_0_7_PPCLOCK_SOCCLK,
    SMU_13_0_7_PPCLOCK_UCLK,
    SMU_13_0_7_PPCLOCK_FCLK,
    SMU_13_0_7_PPCLOCK_DCLK_0,
    SMU_13_0_7_PPCLOCK_VCLK_0,
    SMU_13_0_7_PPCLOCK_DCLK_1,
    SMU_13_0_7_PPCLOCK_VCLK_1,
    SMU_13_0_7_PPCLOCK_DCEFCLK,
    SMU_13_0_7_PPCLOCK_DISPCLK,
    SMU_13_0_7_PPCLOCK_PIXCLK,
    SMU_13_0_7_PPCLOCK_PHYCLK,
    SMU_13_0_7_PPCLOCK_DTBCLK,
    SMU_13_0_7_PPCLOCK_COUNT,
};
#define SMU_13_0_7_MAX_PPCLOCK 16 //Maximum Number of PP Clocks

struct smu_13_0_7_powerplay_table {
    struct atom_common_table_header header; //For PLUM_BONITO, header.format_revision = 15, header.content_revision = 0
    uint8_t table_revision;                 //For PLUM_BONITO, table_revision = 2
    uint8_t padding;
    uint16_t table_size;                    //Driver portion table size. The offset to smc_pptable including header size
    uint32_t golden_pp_id;                  //PPGen use only: PP Table ID on the Golden Data Base
    uint32_t golden_revision;               //PPGen use only: PP Table Revision on the Golden Data Base
    uint16_t format_id;                     //PPGen use only: PPTable for different ASICs. For PLUM_BONITO this should be 0x80
    uint32_t platform_caps;                 //POWERPLAYABLE::ulPlatformCaps

    uint8_t thermal_controller_type; //one of SMU_13_0_7_PP_THERMALCONTROLLER

    uint16_t small_power_limit1;
    uint16_t small_power_limit2;
    uint16_t boost_power_limit; //For Gemini Board, when the slave adapter is in BACO mode, the master adapter will use this boost power limit instead of the default power limit to boost the power limit.
    uint16_t software_shutdown_temp;

    uint32_t reserve[45];

    struct smu_13_0_7_overdrive_table overdrive_table;
    uint8_t padding1;
    PPTable_t smc_pptable; //PPTable_t in driver_if.h
};

#pragma pack(pop)

#endif

Annotation

Implementation Notes