drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h- Extension
.h- Size
- 8908 bytes
- Lines
- 282
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu_smu.h
Detected Declarations
struct smu_13_0_max_sustainable_clocksstruct smu_13_0_dpm_tablesstruct smu_13_0_dpm_contextstruct smu_13_0_power_contextenum smu_13_0_power_state
Annotated Snippet
struct smu_13_0_max_sustainable_clocks {
uint32_t display_clock;
uint32_t phy_clock;
uint32_t pixel_clock;
uint32_t uclock;
uint32_t dcef_clock;
uint32_t soc_clock;
};
struct smu_13_0_dpm_tables {
struct smu_dpm_table soc_table;
struct smu_dpm_table gfx_table;
struct smu_dpm_table uclk_table;
struct smu_dpm_table eclk_table;
struct smu_dpm_table vclk_table;
struct smu_dpm_table dclk_table;
struct smu_dpm_table dcef_table;
struct smu_dpm_table pixel_table;
struct smu_dpm_table display_table;
struct smu_dpm_table phy_table;
struct smu_dpm_table fclk_table;
struct smu_pcie_table pcie_table;
};
struct smu_13_0_dpm_context {
struct smu_13_0_dpm_tables dpm_tables;
uint32_t workload_policy_mask;
uint32_t dcef_min_ds_clk;
uint64_t caps;
uint32_t board_volt;
};
enum smu_13_0_power_state {
SMU_13_0_POWER_STATE__D0 = 0,
SMU_13_0_POWER_STATE__D1,
SMU_13_0_POWER_STATE__D3, /* Sleep*/
SMU_13_0_POWER_STATE__D4, /* Hibernate*/
SMU_13_0_POWER_STATE__D5, /* Power off*/
};
struct smu_13_0_power_context {
uint32_t power_source;
uint8_t in_power_limit_boost_mode;
enum smu_13_0_power_state power_state;
atomic_t throttle_status;
};
#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)
int smu_v13_0_init_microcode(struct smu_context *smu);
void smu_v13_0_fini_microcode(struct smu_context *smu);
int smu_v13_0_load_microcode(struct smu_context *smu);
int smu_v13_0_init_smc_tables(struct smu_context *smu);
int smu_v13_0_fini_smc_tables(struct smu_context *smu);
int smu_v13_0_init_power(struct smu_context *smu);
int smu_v13_0_fini_power(struct smu_context *smu);
int smu_v13_0_check_fw_status(struct smu_context *smu);
int smu_v13_0_setup_pptable(struct smu_context *smu);
int smu_v13_0_get_vbios_bootup_values(struct smu_context *smu);
int smu_v13_0_set_driver_table_location(struct smu_context *smu);
int smu_v13_0_set_tool_table_location(struct smu_context *smu);
int smu_v13_0_notify_memory_pool_location(struct smu_context *smu);
int smu_v13_0_system_features_control(struct smu_context *smu,
bool en);
int smu_v13_0_set_allowed_mask(struct smu_context *smu);
int smu_v13_0_notify_display_change(struct smu_context *smu);
int smu_v13_0_get_current_power_limit(struct smu_context *smu,
uint32_t *power_limit);
int smu_v13_0_set_power_limit(struct smu_context *smu,
enum smu_ppt_limit_type limit_type,
uint32_t limit);
int smu_v13_0_init_max_sustainable_clocks(struct smu_context *smu);
Annotation
- Immediate include surface: `amdgpu_smu.h`.
- Detected declarations: `struct smu_13_0_max_sustainable_clocks`, `struct smu_13_0_dpm_tables`, `struct smu_13_0_dpm_context`, `struct smu_13_0_power_context`, `enum smu_13_0_power_state`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.