drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h
Extension
.h
Size
12494 bytes
Lines
311
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __SMU_CMN_H__
#define __SMU_CMN_H__

#include "amdgpu_smu.h"

extern const struct smu_msg_ops smu_msg_v1_ops;

int smu_msg_wait_response(struct smu_msg_ctl *ctl, u32 timeout_us);
int smu_msg_send_async_locked(struct smu_msg_ctl *ctl,
			      enum smu_message_type msg, u32 param);

#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)

#define FDO_PWM_MODE_STATIC  1
#define FDO_PWM_MODE_STATIC_RPM 5

#define SMU_IH_INTERRUPT_ID_TO_DRIVER                   0xFE
#define SMU_IH_INTERRUPT_CONTEXT_ID_BACO                0x2
#define SMU_IH_INTERRUPT_CONTEXT_ID_AC                  0x3
#define SMU_IH_INTERRUPT_CONTEXT_ID_DC                  0x4
#define SMU_IH_INTERRUPT_CONTEXT_ID_AUDIO_D0            0x5
#define SMU_IH_INTERRUPT_CONTEXT_ID_AUDIO_D3            0x6
#define SMU_IH_INTERRUPT_CONTEXT_ID_THERMAL_THROTTLING  0x7
#define SMU_IH_INTERRUPT_CONTEXT_ID_FAN_ABNORMAL        0x8
#define SMU_IH_INTERRUPT_CONTEXT_ID_FAN_RECOVERY        0x9

#define SMU_IGNORE_IF_VERSION 0xFFFFFFFF

#define smu_cmn_init_soft_gpu_metrics(ptr, frev, crev)                   \
	do {                                                             \
		typecheck(struct gpu_metrics_v##frev##_##crev *, (ptr)); \
		struct gpu_metrics_v##frev##_##crev *tmp = (ptr);        \
		struct metrics_table_header *header =                    \
			(struct metrics_table_header *)tmp;              \
		memset(header, 0xFF, sizeof(*tmp));                      \
		header->format_revision = frev;                          \
		header->content_revision = crev;                         \
		header->structure_size = sizeof(*tmp);                   \
	} while (0)

#define smu_cmn_init_partition_metrics(ptr, fr, cr)                        \
	do {                                                               \
		typecheck(struct amdgpu_partition_metrics_v##fr##_##cr *,  \
			  (ptr));                                          \
		struct amdgpu_partition_metrics_v##fr##_##cr *tmp = (ptr); \
		struct metrics_table_header *header =                      \
			(struct metrics_table_header *)tmp;                \
		memset(header, 0xFF, sizeof(*tmp));                        \
		header->format_revision = fr;                              \
		header->content_revision = cr;                             \
		header->structure_size = sizeof(*tmp);                     \
	} while (0)

#define smu_cmn_init_baseboard_temp_metrics(ptr, fr, cr)                        \
	do {                                                                    \
		typecheck(struct amdgpu_baseboard_temp_metrics_v##fr##_##cr *,  \
			  (ptr));                                               \
		struct amdgpu_baseboard_temp_metrics_v##fr##_##cr *tmp = (ptr); \
		struct metrics_table_header *header =                           \
			(struct metrics_table_header *)tmp;                     \
		memset(header, 0xFF, sizeof(*tmp));                             \
		header->format_revision = fr;                                   \
		header->content_revision = cr;                                  \
		header->structure_size = sizeof(*tmp);                          \
	} while (0)

#define smu_cmn_init_gpuboard_temp_metrics(ptr, fr, cr)                         \
	do {                                                                    \
		typecheck(struct amdgpu_gpuboard_temp_metrics_v##fr##_##cr *,   \
			  (ptr));                                               \
		struct amdgpu_gpuboard_temp_metrics_v##fr##_##cr *tmp = (ptr);  \
		struct metrics_table_header *header =                           \
			(struct metrics_table_header *)tmp;                     \
		memset(header, 0xFF, sizeof(*tmp));                             \
		header->format_revision = fr;                                   \
		header->content_revision = cr;                                  \
		header->structure_size = sizeof(*tmp);                          \
	} while (0)

#define SMU_DPM_PCIE_GEN_IDX(gen)	smu_cmn_dpm_pcie_gen_idx((gen))
#define SMU_DPM_PCIE_WIDTH_IDX(width)	smu_cmn_dpm_pcie_width_idx((width))

#define smu_cmn_update_table(smu, table_index, argument, table_data, drv2smu) \
	smu_cmn_update_table_read_arg((smu), (table_index), (argument), (table_data), NULL, (drv2smu))

extern const int link_speed[];

/* Helper to Convert from PCIE Gen 1/2/3/4/5/6 to 0.1 GT/s speed units */
static inline int pcie_gen_to_speed(uint32_t gen)
{

Annotation

Implementation Notes