drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
Extension
.c
Size
17716 bytes
Lines
611
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (size != 3 || input[0] != 0) {
			dev_err(smu->adev->dev, "Invalid parameter!\n");
			return -EINVAL;
		}

		if (input[1] < CYAN_SKILLFISH_SCLK_MIN ||
			input[1] > CYAN_SKILLFISH_SCLK_MAX) {
			dev_err(smu->adev->dev, "Invalid sclk! Valid sclk range: %uMHz - %uMhz\n",
					CYAN_SKILLFISH_SCLK_MIN, CYAN_SKILLFISH_SCLK_MAX);
			return -EINVAL;
		}

		if (input[2] < CYAN_SKILLFISH_VDDC_MIN ||
			input[2] > CYAN_SKILLFISH_VDDC_MAX) {
			dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n",
					CYAN_SKILLFISH_VDDC_MIN, CYAN_SKILLFISH_VDDC_MAX);
			return -EINVAL;
		}

		cyan_skillfish_user_settings.sclk = input[1];
		cyan_skillfish_user_settings.vddc = input[2];

		break;
	case PP_OD_RESTORE_DEFAULT_TABLE:
		if (size != 0) {
			dev_err(smu->adev->dev, "Invalid parameter!\n");
			return -EINVAL;
		}

		cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default;
		cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC;

		break;
	case PP_OD_COMMIT_DPM_TABLE:
		if (size != 0) {
			dev_err(smu->adev->dev, "Invalid parameter!\n");
			return -EINVAL;
		}

		if (cyan_skillfish_user_settings.sclk < CYAN_SKILLFISH_SCLK_MIN ||
		    cyan_skillfish_user_settings.sclk > CYAN_SKILLFISH_SCLK_MAX) {
			dev_err(smu->adev->dev, "Invalid sclk! Valid sclk range: %uMHz - %uMhz\n",
					CYAN_SKILLFISH_SCLK_MIN, CYAN_SKILLFISH_SCLK_MAX);
			return -EINVAL;
		}

		if ((cyan_skillfish_user_settings.vddc != CYAN_SKILLFISH_VDDC_MAGIC) &&
			(cyan_skillfish_user_settings.vddc < CYAN_SKILLFISH_VDDC_MIN ||
			cyan_skillfish_user_settings.vddc > CYAN_SKILLFISH_VDDC_MAX)) {
			dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n",
					CYAN_SKILLFISH_VDDC_MIN, CYAN_SKILLFISH_VDDC_MAX);
			return -EINVAL;
		}

		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RequestGfxclk,
					cyan_skillfish_user_settings.sclk, NULL);
		if (ret) {
			dev_err(smu->adev->dev, "Set sclk failed!\n");
			return ret;
		}

		if (cyan_skillfish_user_settings.vddc == CYAN_SKILLFISH_VDDC_MAGIC) {
			ret = smu_cmn_send_smc_msg(smu, SMU_MSG_UnforceGfxVid, NULL);
			if (ret) {
				dev_err(smu->adev->dev, "Unforce vddc failed!\n");
				return ret;
			}
		} else {
			/*
			 * PMFW accepts SVI2 VID code, convert voltage to VID:
			 * vid = (uint32_t)((1.55 - voltage) * 160.0 + 0.00001)
			 */
			vid = (1550 - cyan_skillfish_user_settings.vddc) * 160 / 1000;
			ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ForceGfxVid, vid, NULL);
			if (ret) {
				dev_err(smu->adev->dev, "Force vddc failed!\n");
				return ret;
			}
		}

		break;
	default:
		return -EOPNOTSUPP;
	}

	return ret;
}

static int cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu,
						enum smu_clk_type clk_type,

Annotation

Implementation Notes