drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h
Extension: .h
Size: 2450 bytes
Lines: 60
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __VANGOGH_PPT_H__
#define __VANGOGH_PPT_H__


extern void vangogh_set_ppt_funcs(struct smu_context *smu);

/* UMD PState Vangogh Msg Parameters in MHz */
#define VANGOGH_UMD_PSTATE_STANDARD_GFXCLK       1100
#define VANGOGH_UMD_PSTATE_STANDARD_SOCCLK       600
#define VANGOGH_UMD_PSTATE_STANDARD_FCLK         800
#define VANGOGH_UMD_PSTATE_STANDARD_VCLK         705
#define VANGOGH_UMD_PSTATE_STANDARD_DCLK         600

#define VANGOGH_UMD_PSTATE_PEAK_GFXCLK       1300
#define VANGOGH_UMD_PSTATE_PEAK_SOCCLK       600
#define VANGOGH_UMD_PSTATE_PEAK_FCLK         800
#define VANGOGH_UMD_PSTATE_PEAK_VCLK         705
#define VANGOGH_UMD_PSTATE_PEAK_DCLK         600

#define VANGOGH_UMD_PSTATE_MIN_SCLK_GFXCLK       400
#define VANGOGH_UMD_PSTATE_MIN_SCLK_SOCCLK       1000
#define VANGOGH_UMD_PSTATE_MIN_SCLK_FCLK         800
#define VANGOGH_UMD_PSTATE_MIN_SCLK_VCLK         1000
#define VANGOGH_UMD_PSTATE_MIN_SCLK_DCLK         800

#define VANGOGH_UMD_PSTATE_MIN_MCLK_GFXCLK       1100
#define VANGOGH_UMD_PSTATE_MIN_MCLK_SOCCLK       1000
#define VANGOGH_UMD_PSTATE_MIN_MCLK_FCLK         400
#define VANGOGH_UMD_PSTATE_MIN_MCLK_VCLK         1000
#define VANGOGH_UMD_PSTATE_MIN_MCLK_DCLK         800

/* RLC Power Status */
#define RLC_STATUS_OFF          0
#define RLC_STATUS_NORMAL       1

#endif

Annotation

Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.