drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c- Extension
.c- Size
- 39874 bytes
- Lines
- 1156
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hamdgpu.hamdgpu_smu.hsmu_v13_0_12_pmfw.hsmu_v13_0_6_ppt.hsmu_v13_0_12_ppsmc.hsmu_v13_0.hamdgpu_xgmi.hamdgpu_fru_eeprom.hlinux/pci.hsmu_cmn.hamdgpu_ras.h
Detected Declarations
function smu_v13_0_12_tables_initfunction smu_v13_0_12_tables_finifunction smu_v13_0_12_get_enabled_maskfunction smu_v13_0_12_fru_get_product_infofunction smu_v13_0_12_get_max_metrics_sizefunction smu_v13_0_12_get_system_metrics_sizefunction smu_v13_0_12_init_xgmi_datafunction smu_v13_0_12_setup_driver_pptablefunction smu_v13_0_12_is_dpm_runningfunction smu_v13_0_12_get_smu_metrics_datafunction smu_v13_0_12_get_system_metrics_tablefunction smu_v13_0_12_get_node_sensor_typefunction smu_v13_0_12_get_vr_sensor_typefunction smu_v13_0_12_get_system_sensor_typefunction smu_v13_0_12_is_temp_metrics_supportedfunction smu_v13_0_12_get_system_powerfunction smu_v13_0_12_get_npm_datafunction smu_v13_0_12_get_temp_metricsfunction smu_v13_0_12_get_xcp_metricsfunction smu_v13_0_12_get_gpu_metricsfunction for_each_hbm_stackfunction for_each_instfunction smu_v13_0_12_get_ras_table_versionfunction smu_v13_0_12_get_badpage_countfunction smu_v13_0_12_set_timestampfunction smu_v13_0_12_get_timestampfunction smu_v13_0_12_get_badpage_ipidfunction smu_v13_0_12_erase_ras_tablefunction smu_v13_0_12_get_badpage_mca_addrfunction smu_v13_0_12_ras_smu_feature_flags
Annotated Snippet
if (!ret) {
max_width = (uint8_t)metrics->XgmiWidth;
max_speed = (uint16_t)metrics->XgmiBitrate;
}
}
if (!ret)
amgpu_xgmi_set_max_speed_width(smu->adev, max_speed, max_width);
}
int smu_v13_0_12_setup_driver_pptable(struct smu_context *smu)
{
struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
struct smu_table_context *smu_table = &smu->smu_table;
StaticMetricsTable_t *static_metrics = (StaticMetricsTable_t *)smu_table->metrics_table;
struct PPTable_t *pptable =
(struct PPTable_t *)smu_table->driver_pptable;
uint32_t table_version;
int ret, i, n;
if (!pptable->Init) {
ret = smu_v13_0_6_get_static_metrics_table(smu);
if (ret)
return ret;
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetMetricsVersion,
&table_version);
if (ret)
return ret;
smu_table->tables[SMU_TABLE_SMU_METRICS].version =
table_version;
pptable->MaxSocketPowerLimit =
SMUQ10_ROUND(static_metrics->MaxSocketPowerLimit);
pptable->MaxGfxclkFrequency =
SMUQ10_ROUND(static_metrics->MaxGfxclkFrequency);
pptable->MinGfxclkFrequency =
SMUQ10_ROUND(static_metrics->MinGfxclkFrequency);
for (i = 0; i < 4; ++i) {
pptable->FclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->FclkFrequencyTable[i]);
pptable->UclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->UclkFrequencyTable[i]);
pptable->SocclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->SocclkFrequencyTable[i]);
pptable->VclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->VclkFrequencyTable[i]);
pptable->DclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->DclkFrequencyTable[i]);
pptable->LclkFrequencyTable[i] =
SMUQ10_ROUND(static_metrics->LclkFrequencyTable[i]);
}
/* use AID0 serial number by default */
pptable->PublicSerialNumber_AID =
static_metrics->PublicSerialNumber_AID[0];
amdgpu_device_set_uid(smu->adev->uid_info, AMDGPU_UID_TYPE_SOC,
0, pptable->PublicSerialNumber_AID);
n = ARRAY_SIZE(static_metrics->PublicSerialNumber_AID);
for (i = 0; i < n; i++) {
amdgpu_device_set_uid(
smu->adev->uid_info, AMDGPU_UID_TYPE_AID, i,
static_metrics->PublicSerialNumber_AID[i]);
}
n = ARRAY_SIZE(static_metrics->PublicSerialNumber_XCD);
for (i = 0; i < n; i++) {
amdgpu_device_set_uid(
smu->adev->uid_info, AMDGPU_UID_TYPE_XCD, i,
static_metrics->PublicSerialNumber_XCD[i]);
}
ret = smu_v13_0_12_fru_get_product_info(smu, static_metrics);
if (ret)
return ret;
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(BOARD_VOLTAGE))) {
if (!static_metrics->InputTelemetryVoltageInmV) {
dev_warn(smu->adev->dev, "Invalid board voltage %d\n",
static_metrics->InputTelemetryVoltageInmV);
}
dpm_context->board_volt = static_metrics->InputTelemetryVoltageInmV;
}
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(PLDM_VERSION)) &&
static_metrics->pldmVersion[0] != 0xFFFFFFFF)
smu->adev->firmware.pldm_version =
static_metrics->pldmVersion[0];
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(NPM_METRICS)))
pptable->MaxNodePowerLimit =
SMUQ10_ROUND(static_metrics->MaxNodePowerLimit);
Annotation
- Immediate include surface: `linux/firmware.h`, `amdgpu.h`, `amdgpu_smu.h`, `smu_v13_0_12_pmfw.h`, `smu_v13_0_6_ppt.h`, `smu_v13_0_12_ppsmc.h`, `smu_v13_0.h`, `amdgpu_xgmi.h`.
- Detected declarations: `function smu_v13_0_12_tables_init`, `function smu_v13_0_12_tables_fini`, `function smu_v13_0_12_get_enabled_mask`, `function smu_v13_0_12_fru_get_product_info`, `function smu_v13_0_12_get_max_metrics_size`, `function smu_v13_0_12_get_system_metrics_size`, `function smu_v13_0_12_init_xgmi_data`, `function smu_v13_0_12_setup_driver_pptable`, `function smu_v13_0_12_is_dpm_running`, `function smu_v13_0_12_get_smu_metrics_data`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.