drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h
Extension
.h
Size
14903 bytes
Lines
285
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct PPTable_t {
	uint32_t MaxSocketPowerLimit;
	uint32_t MaxGfxclkFrequency;
	uint32_t MinGfxclkFrequency;
	uint32_t FclkFrequencyTable[4];
	uint32_t UclkFrequencyTable[4];
	uint32_t SocclkFrequencyTable[4];
	uint32_t VclkFrequencyTable[4];
	uint32_t DclkFrequencyTable[4];
	uint32_t LclkFrequencyTable[4];
	uint32_t MaxLclkDpmRange;
	uint32_t MinLclkDpmRange;
	uint64_t PublicSerialNumber_AID;
	uint32_t MaxNodePowerLimit;
	uint32_t PPT1Max;
	uint32_t PPT1Min;
	uint32_t PPT1Default;
	bool Init;
};

enum smu_v13_0_6_caps {
	SMU_CAP(DPM),
	SMU_CAP(DPM_POLICY),
	SMU_CAP(OTHER_END_METRICS),
	SMU_CAP(SET_UCLK_MAX),
	SMU_CAP(PCIE_METRICS),
	SMU_CAP(MCA_DEBUG_MODE),
	SMU_CAP(PER_INST_METRICS),
	SMU_CAP(CTF_LIMIT),
	SMU_CAP(RMA_MSG),
	SMU_CAP(ACA_SYND),
	SMU_CAP(SDMA_RESET),
	SMU_CAP(VCN_RESET),
	SMU_CAP(STATIC_METRICS),
	SMU_CAP(HST_LIMIT_METRICS),
	SMU_CAP(BOARD_VOLTAGE),
	SMU_CAP(PLDM_VERSION),
	SMU_CAP(TEMP_METRICS),
	SMU_CAP(NPM_METRICS),
	SMU_CAP(RAS_EEPROM),
	SMU_CAP(FAST_PPT),
	SMU_CAP(SYSTEM_POWER_METRICS),
	SMU_CAP(TEMP_AID_XCD_HBM),
	SMU_CAP(ALL),
};

#define SMU_13_0_6_NUM_XGMI_LINKS 8
#define SMU_13_0_6_MAX_GFX_CLKS 8
#define SMU_13_0_6_MAX_CLKS 4
#define SMU_13_0_6_MAX_XCC 8
#define SMU_13_0_6_MAX_VCN 4
#define SMU_13_0_6_MAX_JPEG 40
#define SMU_13_0_6_MAX_AID 4
#define SMU_13_0_6_MAX_HBM_STACKS 8

extern void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu);
bool smu_v13_0_6_cap_supported(struct smu_context *smu, enum smu_v13_0_6_caps cap);
int smu_v13_0_6_get_static_metrics_table(struct smu_context *smu);
int smu_v13_0_6_get_metrics_table(struct smu_context *smu, void *metrics_table,
				  bool bypass_cache);

bool smu_v13_0_12_is_dpm_running(struct smu_context *smu);
int smu_v13_0_12_get_max_metrics_size(void);
size_t smu_v13_0_12_get_system_metrics_size(void);
int smu_v13_0_12_setup_driver_pptable(struct smu_context *smu);
int smu_v13_0_12_get_smu_metrics_data(struct smu_context *smu,
				      MetricsMember_t member, uint32_t *value);
ssize_t smu_v13_0_12_get_xcp_metrics(struct smu_context *smu,
				     struct amdgpu_xcp *xcp, void *table,
				     void *smu_metrics);
int smu_v13_0_12_tables_init(struct smu_context *smu);
void smu_v13_0_12_tables_fini(struct smu_context *smu);
int smu_v13_0_12_get_npm_data(struct smu_context *smu,
			      enum amd_pp_sensors sensor,
			      uint32_t *value);
int smu_v13_0_12_get_system_power(struct smu_context *smu,
				  enum amd_pp_sensors sensor,
				  uint32_t *value);
extern const struct cmn2asic_mapping smu_v13_0_12_feature_mask_map[];
extern const struct cmn2asic_msg_mapping smu_v13_0_12_message_map[];
extern const struct smu_temp_funcs smu_v13_0_12_temp_funcs;
extern const struct ras_smu_drv smu_v13_0_12_ras_smu_drv;

#if defined(SWSMU_CODE_LAYER_L2)
#include "smu_cmn.h"

/* SMUv 13.0.6 GPU metrics*/
#define SMU_13_0_6_METRICS_FIELDS(SMU_SCALAR, SMU_ARRAY)                       \
	SMU_SCALAR(SMU_MATTR(TEMPERATURE_HOTSPOT), SMU_MUNIT(TEMP_1),          \
		   SMU_MTYPE(U16), temperature_hotspot);                       \

Annotation

Implementation Notes