drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c- Extension
.c- Size
- 96183 bytes
- Lines
- 2895
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hlinux/pci.hlinux/i2c.hamdgpu.hamdgpu_smu.hatomfirmware.hamdgpu_atomfirmware.hamdgpu_atombios.hsmu_v13_0.hsmu13_driver_if_v13_0_7.hsoc15_common.hatom.hsmu_v13_0_7_ppt.hsmu_v13_0_7_pptable.hsmu_v13_0_7_ppsmc.hnbio/nbio_4_3_0_offset.hnbio/nbio_4_3_0_sh_mask.hmp/mp_13_0_0_offset.hmp/mp_13_0_0_sh_mask.hasic_reg/mp/mp_13_0_0_sh_mask.hsmu_cmn.hamdgpu_ras.h
Detected Declarations
struct atom_smc_dpm_info_table_13_0_7function smu_v13_0_7_init_allowed_featuresfunction smu_v13_0_7_check_powerplay_tablefunction smu_v13_0_7_store_powerplay_tablefunction smu_v13_0_7_check_fw_statusfunction smu_v13_0_7_append_powerplay_tablefunction smu_v13_0_7_get_pptable_from_pmfwfunction smu_v13_0_7_setup_pptablefunction smu_v13_0_7_tables_initfunction smu_v13_0_7_allocate_dpm_contextfunction smu_v13_0_7_init_smc_tablesfunction smu_v13_0_7_set_default_dpm_tablefunction smu_v13_0_7_is_dpm_runningfunction smu_v13_0_7_get_throttler_statusfunction smu_v13_0_7_get_smu_metrics_datafunction smu_v13_0_7_get_dpm_ultimate_freqfunction smu_v13_0_7_read_sensorfunction smu_v13_0_7_get_current_clk_freq_by_tablefunction smu_v13_0_7_is_od_feature_supportedfunction smu_v13_0_7_get_od_setting_limitsfunction smu_v13_0_7_dump_od_tablefunction smu_v13_0_7_get_overdrive_tablefunction smu_v13_0_7_upload_overdrive_tablefunction smu_v13_0_7_emit_clk_levelsfunction smu_v13_0_7_od_restore_table_singlefunction smu_v13_0_7_od_edit_dpm_tablefunction smu_v13_0_7_force_clk_levelsfunction smu_v13_0_7_get_thermal_temperature_rangefunction smu_v13_0_7_get_gpu_metricsfunction smu_v13_0_7_set_supported_od_feature_maskfunction smu_v13_0_7_set_default_od_settingsfunction smu_v13_0_7_restore_user_od_settingsfunction smu_v13_0_7_populate_umd_state_clkfunction smu_v13_0_7_get_fan_speed_pwmfunction smu_v13_0_7_get_fan_speed_rpmfunction smu_v13_0_7_enable_mgpu_fan_boostfunction smu_v13_0_7_get_power_limitfunction smu_v13_0_7_get_power_profile_modefunction smu_v13_0_7_set_power_profile_mode_coefffunction smu_v13_0_7_set_power_profile_modefunction smu_v13_0_7_set_mp1_statefunction smu_v13_0_7_is_mode1_reset_supportedfunction smu_v13_0_7_set_df_cstatefunction smu_v13_0_7_wbrf_support_checkfunction smu_v13_0_7_set_power_limitfunction smu_v13_0_7_update_pcie_parametersfunction smu_v13_0_7_mode1_resetfunction smu_v13_0_7_init_msg_ctl
Annotated Snippet
struct atom_smc_dpm_info_table_13_0_7 {
struct atom_common_table_header table_header;
BoardTable_t BoardTable;
};
#endif
static int smu_v13_0_7_append_powerplay_table(struct smu_context *smu)
{
struct smu_table_context *table_context = &smu->smu_table;
PPTable_t *smc_pptable = table_context->driver_pptable;
struct atom_smc_dpm_info_table_13_0_7 *smc_dpm_table;
BoardTable_t *BoardTable = &smc_pptable->BoardTable;
int index, ret;
index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
smc_dpm_info);
ret = amdgpu_atombios_get_data_table(smu->adev, index, NULL, NULL, NULL,
(uint8_t **)&smc_dpm_table);
if (ret)
return ret;
memcpy(BoardTable, &smc_dpm_table->BoardTable, sizeof(BoardTable_t));
return 0;
}
static int smu_v13_0_7_get_pptable_from_pmfw(struct smu_context *smu,
void **table,
uint32_t *size)
{
struct smu_table_context *smu_table = &smu->smu_table;
void *combo_pptable = smu_table->combo_pptable;
int ret = 0;
ret = smu_cmn_get_combo_pptable(smu);
if (ret)
return ret;
*table = combo_pptable;
*size = sizeof(struct smu_13_0_7_powerplay_table);
return 0;
}
static int smu_v13_0_7_setup_pptable(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
struct amdgpu_device *adev = smu->adev;
int ret = 0;
/*
* With SCPM enabled, the pptable used will be signed. It cannot
* be used directly by driver. To get the raw pptable, we need to
* rely on the combo pptable(and its revelant SMU message).
*/
ret = smu_v13_0_7_get_pptable_from_pmfw(smu,
&smu_table->power_play_table,
&smu_table->power_play_table_size);
if (ret)
return ret;
ret = smu_v13_0_7_store_powerplay_table(smu);
if (ret)
return ret;
/*
* With SCPM enabled, the operation below will be handled
* by PSP. Driver involvment is unnecessary and useless.
*/
if (!adev->scpm_enabled) {
ret = smu_v13_0_7_append_powerplay_table(smu);
if (ret)
return ret;
}
ret = smu_v13_0_7_check_powerplay_table(smu);
if (ret)
return ret;
return ret;
}
static int smu_v13_0_7_tables_init(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
Annotation
- Immediate include surface: `linux/firmware.h`, `linux/pci.h`, `linux/i2c.h`, `amdgpu.h`, `amdgpu_smu.h`, `atomfirmware.h`, `amdgpu_atomfirmware.h`, `amdgpu_atombios.h`.
- Detected declarations: `struct atom_smc_dpm_info_table_13_0_7`, `function smu_v13_0_7_init_allowed_features`, `function smu_v13_0_7_check_powerplay_table`, `function smu_v13_0_7_store_powerplay_table`, `function smu_v13_0_7_check_fw_status`, `function smu_v13_0_7_append_powerplay_table`, `function smu_v13_0_7_get_pptable_from_pmfw`, `function smu_v13_0_7_setup_pptable`, `function smu_v13_0_7_tables_init`, `function smu_v13_0_7_allocate_dpm_context`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.