drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c- Extension
.c- Size
- 52961 bytes
- Lines
- 1777
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smu_types.hamdgpu.hamdgpu_smu.hsmu_v14_0.hsmu14_driver_if_v14_0_0.hsmu_v14_0_0_ppt.hsmu_v14_0_0_ppsmc.hsmu_v14_0_0_pmfw.hsmu_cmn.h
Detected Declarations
enum smu_mall_pg_configfunction smu_v14_0_0_init_smc_tablesfunction smu_v14_0_0_fini_smc_tablesfunction smu_v14_0_0_system_features_controlfunction smu_v14_0_0_get_smu_metrics_datafunction smu_v14_0_0_read_sensorfunction smu_v14_0_0_is_dpm_runningfunction smu_v14_0_0_set_watermarks_tablefunction smu_v14_0_0_get_gpu_metricsfunction smu_v14_0_0_mode2_resetfunction smu_v14_0_1_get_dpm_freq_by_indexfunction smu_v14_0_0_get_dpm_freq_by_indexfunction smu_v14_0_common_get_dpm_freq_by_indexfunction smu_v14_0_0_clk_dpm_is_enabledfunction smu_v14_0_1_get_dpm_ultimate_freqfunction smu_v14_0_0_get_dpm_ultimate_freqfunction smu_v14_0_common_get_dpm_ultimate_freqfunction smu_v14_0_0_get_current_clk_freqfunction smu_v14_0_1_get_dpm_level_countfunction smu_v14_0_0_get_dpm_level_countfunction smu_v14_0_common_get_dpm_level_countfunction smu_v14_0_0_emit_clk_levelsfunction smu_v14_0_0_set_soft_freq_limited_rangefunction smu_v14_0_0_force_clk_levelsfunction smu_v14_0_common_get_dpm_profile_freqfunction smu_v14_0_common_set_performance_levelfunction smu_v14_0_1_set_fine_grain_gfx_freq_parametersfunction smu_v14_0_0_set_fine_grain_gfx_freq_parametersfunction smu_v14_0_common_set_fine_grain_gfx_freq_parametersfunction smu_v14_0_0_set_vpe_enablefunction smu_v14_0_0_set_isp_enablefunction smu_v14_0_0_set_umsch_mm_enablefunction smu_14_0_1_get_dpm_tablefunction smu_14_0_0_get_dpm_tablefunction smu_v14_0_common_get_dpm_tablefunction smu_v14_0_1_init_mall_power_gatingfunction smu_v14_0_common_set_mall_enablefunction smu_v14_0_0_restore_user_od_settingsfunction smu_v14_0_0_init_msg_ctlfunction smu_v14_0_0_set_ppt_funcs
Annotated Snippet
if (ret) {
dev_err(smu->adev->dev, "Failed to update WMTABLE!");
return ret;
}
smu->watermarks_bitmap |= WATERMARKS_LOADED;
}
return 0;
}
static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu,
void **table)
{
struct gpu_metrics_v3_0 *gpu_metrics =
(struct gpu_metrics_v3_0 *)smu_driver_table_ptr(
smu, SMU_DRIVER_TABLE_GPU_METRICS);
SmuMetrics_t metrics;
int ret = 0;
ret = smu_cmn_get_metrics_table(smu, &metrics, true);
if (ret)
return ret;
smu_cmn_init_soft_gpu_metrics(gpu_metrics, 3, 0);
gpu_metrics->temperature_gfx = metrics.GfxTemperature;
gpu_metrics->temperature_soc = metrics.SocTemperature;
memcpy(&gpu_metrics->temperature_core[0],
&metrics.CoreTemperature[0],
sizeof(uint16_t) * 16);
gpu_metrics->temperature_skin = metrics.SkinTemp;
gpu_metrics->average_gfx_activity = metrics.GfxActivity;
gpu_metrics->average_vcn_activity = metrics.VcnActivity;
memcpy(&gpu_metrics->average_ipu_activity[0],
&metrics.IpuBusy[0],
sizeof(uint16_t) * 8);
memcpy(&gpu_metrics->average_core_c0_activity[0],
&metrics.CoreC0Residency[0],
sizeof(uint16_t) * 16);
gpu_metrics->average_dram_reads = metrics.DRAMReads;
gpu_metrics->average_dram_writes = metrics.DRAMWrites;
gpu_metrics->average_ipu_reads = metrics.IpuReads;
gpu_metrics->average_ipu_writes = metrics.IpuWrites;
gpu_metrics->average_socket_power = metrics.SocketPower;
gpu_metrics->average_ipu_power = metrics.IpuPower;
gpu_metrics->average_apu_power = metrics.ApuPower;
gpu_metrics->average_gfx_power = metrics.GfxPower;
gpu_metrics->average_dgpu_power = metrics.dGpuPower;
gpu_metrics->average_all_core_power = metrics.AllCorePower;
gpu_metrics->average_sys_power = metrics.Psys;
memcpy(&gpu_metrics->average_core_power[0],
&metrics.CorePower[0],
sizeof(uint16_t) * 16);
gpu_metrics->average_gfxclk_frequency = metrics.GfxclkFrequency;
gpu_metrics->average_socclk_frequency = metrics.SocclkFrequency;
gpu_metrics->average_vpeclk_frequency = metrics.VpeclkFrequency;
gpu_metrics->average_fclk_frequency = metrics.FclkFrequency;
gpu_metrics->average_vclk_frequency = metrics.VclkFrequency;
gpu_metrics->average_ipuclk_frequency = metrics.IpuclkFrequency;
gpu_metrics->average_uclk_frequency = metrics.MemclkFrequency;
gpu_metrics->average_mpipu_frequency = metrics.MpipuclkFrequency;
memcpy(&gpu_metrics->current_coreclk[0],
&metrics.CoreFrequency[0],
sizeof(uint16_t) * 16);
gpu_metrics->current_core_maxfreq = metrics.InfrastructureCpuMaxFreq;
gpu_metrics->current_gfx_maxfreq = metrics.InfrastructureGfxMaxFreq;
gpu_metrics->throttle_residency_prochot = metrics.ThrottleResidency_PROCHOT;
gpu_metrics->throttle_residency_spl = metrics.ThrottleResidency_SPL;
gpu_metrics->throttle_residency_fppt = metrics.ThrottleResidency_FPPT;
gpu_metrics->throttle_residency_sppt = metrics.ThrottleResidency_SPPT;
gpu_metrics->throttle_residency_thm_core = metrics.ThrottleResidency_THM_CORE;
gpu_metrics->throttle_residency_thm_gfx = metrics.ThrottleResidency_THM_GFX;
gpu_metrics->throttle_residency_thm_soc = metrics.ThrottleResidency_THM_SOC;
gpu_metrics->time_filter_alphavalue = metrics.FilterAlphaValue;
gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
*table = (void *)gpu_metrics;
smu_driver_table_update_cache_time(smu, SMU_DRIVER_TABLE_GPU_METRICS);
return sizeof(struct gpu_metrics_v3_0);
}
static int smu_v14_0_0_mode2_reset(struct smu_context *smu)
Annotation
- Immediate include surface: `smu_types.h`, `amdgpu.h`, `amdgpu_smu.h`, `smu_v14_0.h`, `smu14_driver_if_v14_0_0.h`, `smu_v14_0_0_ppt.h`, `smu_v14_0_0_ppsmc.h`, `smu_v14_0_0_pmfw.h`.
- Detected declarations: `enum smu_mall_pg_config`, `function smu_v14_0_0_init_smc_tables`, `function smu_v14_0_0_fini_smc_tables`, `function smu_v14_0_0_system_features_control`, `function smu_v14_0_0_get_smu_metrics_data`, `function smu_v14_0_0_read_sensor`, `function smu_v14_0_0_is_dpm_running`, `function smu_v14_0_0_set_watermarks_table`, `function smu_v14_0_0_get_gpu_metrics`, `function smu_v14_0_0_mode2_reset`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.