drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c- Extension
.c- Size
- 94849 bytes
- Lines
- 2918
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hlinux/pci.hlinux/i2c.hamdgpu.hamdgpu_smu.hatomfirmware.hamdgpu_atomfirmware.hamdgpu_atombios.hsmu_v14_0.hsmu14_driver_if_v14_0.hsoc15_common.hatom.hsmu_v14_0_2_ppt.hsmu_v14_0_2_pptable.hsmu_v14_0_2_ppsmc.hmp/mp_14_0_2_offset.hmp/mp_14_0_2_sh_mask.hsmu_cmn.hamdgpu_ras.h
Detected Declarations
function smu_v14_0_2_init_allowed_featuresfunction smu_v14_0_2_check_powerplay_tablefunction smu_v14_0_2_store_powerplay_tablefunction smu_v14_0_2_get_pptable_from_pmfwfunction smu_v14_0_2_setup_pptablefunction smu_v14_0_2_tables_initfunction smu_v14_0_2_allocate_dpm_contextfunction smu_v14_0_2_init_smc_tablesfunction smu_v14_0_2_set_default_dpm_tablefunction frequencyfunction smu_v14_0_2_is_dpm_runningfunction smu_v14_0_2_get_throttler_statusfunction smu_v14_0_2_get_smu_metrics_datafunction smu_v14_0_2_get_dpm_ultimate_freqfunction smu_v14_0_2_read_sensorfunction smu_v14_0_2_get_current_clk_freq_by_tablefunction smu_v14_0_2_is_od_feature_supportedfunction smu_v14_0_2_get_od_setting_limitsfunction smu_v14_0_2_emit_clk_levelsfunction smu_v14_0_2_force_clk_levelsfunction smu_v14_0_2_update_pcie_parametersfunction smu_v14_0_2_get_thermal_temperature_rangefunction smu_v14_0_2_populate_umd_state_clkfunction smu_v14_0_2_get_unique_idfunction smu_v14_0_2_get_fan_speed_pwmfunction smu_v14_0_2_get_fan_speed_rpmfunction smu_v14_0_2_get_power_limitfunction smu_v14_0_2_get_power_profile_modefunction smu_v14_0_2_set_power_profile_mode_coefffunction smu_v14_0_2_set_power_profile_modefunction smu_v14_0_2_baco_enterfunction smu_v14_0_2_baco_exitfunction smu_v14_0_2_is_mode1_reset_supportedfunction smu_v14_0_2_i2c_xferfunction smu_v14_0_2_i2c_funcfunction smu_v14_0_2_i2c_control_initfunction smu_v14_0_2_i2c_control_finifunction smu_v14_0_2_set_mp1_statefunction smu_v14_0_2_set_df_cstatefunction smu_v14_0_2_mode1_resetfunction smu_v14_0_2_mode2_resetfunction smu_v14_0_2_enable_gfx_featuresfunction smu_v14_0_2_init_msg_ctlfunction smu_v14_0_2_get_gpu_metricsfunction smu_v14_0_2_dump_od_tablefunction smu_v14_0_2_upload_overdrive_tablefunction smu_v14_0_2_set_supported_od_feature_maskfunction smu_v14_0_2_get_overdrive_table
Annotated Snippet
if (feature_enabled) {
smu_v14_0_2_get_od_setting_limits(smu, PP_OD_FEATURE_FAN_CURVE_TEMP,
&min_value, &max_value);
if (!min_value && !max_value) {
feature_enabled = false;
goto out;
}
smu_v14_0_2_get_od_setting_limits(smu, PP_OD_FEATURE_FAN_CURVE_PWM,
&min_value, &max_value);
if (!min_value && !max_value) {
feature_enabled = false;
goto out;
}
}
break;
default:
feature_enabled = !!(overdrive_upperlimits->FeatureCtrlMask & (1U << od_feature_bit));
break;
}
out:
return feature_enabled;
}
static void smu_v14_0_2_get_od_setting_limits(struct smu_context *smu,
int od_feature_bit,
int32_t *min,
int32_t *max)
{
PPTable_t *pptable = smu->smu_table.driver_pptable;
const OverDriveLimits_t * const overdrive_upperlimits =
&pptable->SkuTable.OverDriveLimitsBasicMax;
const OverDriveLimits_t * const overdrive_lowerlimits =
&pptable->SkuTable.OverDriveLimitsBasicMin;
int32_t od_min_setting, od_max_setting;
switch (od_feature_bit) {
case PP_OD_FEATURE_GFXCLK_FMIN:
case PP_OD_FEATURE_GFXCLK_FMAX:
od_min_setting = overdrive_lowerlimits->GfxclkFoffset;
od_max_setting = overdrive_upperlimits->GfxclkFoffset;
break;
case PP_OD_FEATURE_UCLK_FMIN:
od_min_setting = overdrive_lowerlimits->UclkFmin;
od_max_setting = overdrive_upperlimits->UclkFmin;
break;
case PP_OD_FEATURE_UCLK_FMAX:
od_min_setting = overdrive_lowerlimits->UclkFmax;
od_max_setting = overdrive_upperlimits->UclkFmax;
break;
case PP_OD_FEATURE_GFX_VF_CURVE:
od_min_setting = overdrive_lowerlimits->VoltageOffsetPerZoneBoundary[0];
od_max_setting = overdrive_upperlimits->VoltageOffsetPerZoneBoundary[0];
break;
case PP_OD_FEATURE_FAN_CURVE_TEMP:
od_min_setting = overdrive_lowerlimits->FanLinearTempPoints[0];
od_max_setting = overdrive_upperlimits->FanLinearTempPoints[0];
break;
case PP_OD_FEATURE_FAN_CURVE_PWM:
od_min_setting = overdrive_lowerlimits->FanLinearPwmPoints[0];
od_max_setting = overdrive_upperlimits->FanLinearPwmPoints[0];
break;
case PP_OD_FEATURE_FAN_ACOUSTIC_LIMIT:
od_min_setting = overdrive_lowerlimits->AcousticLimitRpmThreshold;
od_max_setting = overdrive_upperlimits->AcousticLimitRpmThreshold;
break;
case PP_OD_FEATURE_FAN_ACOUSTIC_TARGET:
od_min_setting = overdrive_lowerlimits->AcousticTargetRpmThreshold;
od_max_setting = overdrive_upperlimits->AcousticTargetRpmThreshold;
break;
case PP_OD_FEATURE_FAN_TARGET_TEMPERATURE:
od_min_setting = overdrive_lowerlimits->FanTargetTemperature;
od_max_setting = overdrive_upperlimits->FanTargetTemperature;
break;
case PP_OD_FEATURE_FAN_MINIMUM_PWM:
od_min_setting = overdrive_lowerlimits->FanMinimumPwm;
od_max_setting = overdrive_upperlimits->FanMinimumPwm;
break;
case PP_OD_FEATURE_FAN_ZERO_RPM_ENABLE:
od_min_setting = overdrive_lowerlimits->FanZeroRpmEnable;
od_max_setting = overdrive_upperlimits->FanZeroRpmEnable;
break;
default:
od_min_setting = od_max_setting = INT_MAX;
break;
}
if (min)
*min = od_min_setting;
Annotation
- Immediate include surface: `linux/firmware.h`, `linux/pci.h`, `linux/i2c.h`, `amdgpu.h`, `amdgpu_smu.h`, `atomfirmware.h`, `amdgpu_atomfirmware.h`, `amdgpu_atombios.h`.
- Detected declarations: `function smu_v14_0_2_init_allowed_features`, `function smu_v14_0_2_check_powerplay_table`, `function smu_v14_0_2_store_powerplay_table`, `function smu_v14_0_2_get_pptable_from_pmfw`, `function smu_v14_0_2_setup_pptable`, `function smu_v14_0_2_tables_init`, `function smu_v14_0_2_allocate_dpm_context`, `function smu_v14_0_2_init_smc_tables`, `function smu_v14_0_2_set_default_dpm_table`, `function frequency`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.