drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c
Extension
.c
Size
8915 bytes
Lines
281
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
/*
 * Copyright 2025 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include "ras_sys.h"
#include "amdgpu_ras_mgr.h"
#include "amdgpu_ras.h"
#include "amdgpu_reset.h"

static int amdgpu_ras_sys_detect_fatal_event(struct ras_core_context *ras_core, void *data)
{
	struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
	int ret;
	uint64_t seq_no;

	ret = amdgpu_ras_global_ras_isr(adev);
	if (ret)
		return ret;

	seq_no = amdgpu_ras_mgr_gen_ras_event_seqno(adev, RAS_SEQNO_TYPE_UE);
	RAS_DEV_INFO(adev,
		"{%llu} Uncorrectable hardware error(ERREVENT_ATHUB_INTERRUPT) detected!\n",
		seq_no);

	return amdgpu_ras_process_handle_unexpected_interrupt(adev, data);
}

static int amdgpu_ras_sys_poison_consumption_event(struct ras_core_context *ras_core,
				void *data)
{
	struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
	struct ras_event_req *req = (struct ras_event_req *)data;
	pasid_notify pasid_fn;

	if (!req)
		return -EINVAL;

	if (req->pasid_fn) {
		pasid_fn = (pasid_notify)req->pasid_fn;
		pasid_fn(adev, req->pasid, req->data);
	}

	return 0;
}

static int amdgpu_ras_sys_gen_seqno(struct ras_core_context *ras_core,
			enum ras_seqno_type seqno_type, uint64_t *seqno)
{
	struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
	struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev);
	struct ras_event_manager *event_mgr;
	struct ras_event_state *event_state;
	struct amdgpu_hive_info *hive;
	enum ras_event_type event_type;
	uint64_t seq_no;

	if (!ras_mgr || !seqno ||
		(seqno_type >= RAS_SEQNO_TYPE_COUNT_MAX))
		return -EINVAL;

	switch (seqno_type) {
	case RAS_SEQNO_TYPE_UE:
		event_type = RAS_EVENT_TYPE_FATAL;
		break;
	case RAS_SEQNO_TYPE_CE:
	case RAS_SEQNO_TYPE_DE:
		event_type = RAS_EVENT_TYPE_POISON_CREATION;
		break;
	case RAS_SEQNO_TYPE_POISON_CONSUMPTION:
		event_type = RAS_EVENT_TYPE_POISON_CONSUMPTION;
		break;

Annotation

Implementation Notes