drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.c- Extension
.c- Size
- 11275 bytes
- Lines
- 380
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ras.hras_aca.hras_core_status.hras_aca_v1_0.h
Detected Declarations
struct ras_aca_hwipfunction aca_decode_bank_infofunction aca_check_bank_hwipfunction aca_match_bank_defaultfunction aca_match_gfx_bankfunction aca_match_sdma_bankfunction aca_match_mmhub_bankfunction aca_check_umc_defunction aca_check_umc_uefunction aca_check_umc_cefunction aca_parse_umc_bankfunction aca_check_bank_is_defunction aca_parse_bank_defaultfunction aca_parse_xgmi_bank
Annotated Snippet
struct ras_aca_hwip {
int hwid;
int mcatype;
};
static struct ras_aca_hwip aca_hwid_mcatypes[ACA_ECC_HWIP_COUNT] = {
[ACA_ECC_HWIP__SMU] = {0x01, 0x01},
[ACA_ECC_HWIP__PCS_XGMI] = {0x50, 0x00},
[ACA_ECC_HWIP__UMC] = {0x96, 0x00},
};
static int aca_decode_bank_info(struct aca_block *aca_blk,
struct aca_bank_reg *bank, struct aca_ecc_info *info)
{
u64 ipid;
u32 instidhi, instidlo;
ipid = bank->regs[ACA_REG_IDX__IPID];
info->hwid = ACA_REG_IPID_HARDWAREID(ipid);
info->mcatype = ACA_REG_IPID_MCATYPE(ipid);
/*
* Unified DieID Format: SAASS. A:AID, S:Socket.
* Unified DieID[4:4] = InstanceId[0:0]
* Unified DieID[0:3] = InstanceIdHi[0:3]
*/
instidhi = ACA_REG_IPID_INSTANCEIDHI(ipid);
instidlo = ACA_REG_IPID_INSTANCEIDLO(ipid);
info->die_id = ((instidhi >> 2) & 0x03);
info->socket_id = ((instidlo & 0x1) << 2) | (instidhi & 0x03);
if ((aca_blk->blk_info->hwip == ACA_ECC_HWIP__SMU) &&
(aca_blk->blk_info->ras_block_id == RAS_BLOCK_ID__GFX))
info->xcd_id =
((instidlo & GENMASK_ULL(31, 1)) == mmSMNAID_XCD0_MCA_SMU) ? 0 : 1;
return 0;
}
static bool aca_check_bank_hwip(struct aca_bank_reg *bank, enum aca_ecc_hwip type)
{
struct ras_aca_hwip *hwip;
int hwid, mcatype;
u64 ipid;
if (!bank || (type == ACA_ECC_HWIP__UNKNOWN))
return false;
hwip = &aca_hwid_mcatypes[type];
if (!hwip->hwid)
return false;
ipid = bank->regs[ACA_REG_IDX__IPID];
hwid = ACA_REG_IPID_HARDWAREID(ipid);
mcatype = ACA_REG_IPID_MCATYPE(ipid);
return hwip->hwid == hwid && hwip->mcatype == mcatype;
}
static bool aca_match_bank_default(struct aca_block *aca_blk, void *data)
{
return aca_check_bank_hwip((struct aca_bank_reg *)data, aca_blk->blk_info->hwip);
}
static bool aca_match_gfx_bank(struct aca_block *aca_blk, void *data)
{
struct aca_bank_reg *bank = (struct aca_bank_reg *)data;
u32 instlo;
if (!aca_check_bank_hwip(bank, aca_blk->blk_info->hwip))
return false;
instlo = ACA_REG_IPID_INSTANCEIDLO(bank->regs[ACA_REG_IDX__IPID]);
instlo &= GENMASK_ULL(31, 1);
switch (instlo) {
case mmSMNAID_XCD0_MCA_SMU:
case mmSMNAID_XCD1_MCA_SMU:
case mmSMNXCD_XCD0_MCA_SMU:
return true;
default:
break;
}
return false;
}
static bool aca_match_sdma_bank(struct aca_block *aca_blk, void *data)
{
struct aca_bank_reg *bank = (struct aca_bank_reg *)data;
/* CODE_SDMA0 - CODE_SDMA4, reference to smu driver if header file */
static int sdma_err_codes[] = { 33, 34, 35, 36 };
Annotation
- Immediate include surface: `ras.h`, `ras_aca.h`, `ras_core_status.h`, `ras_aca_v1_0.h`.
- Detected declarations: `struct ras_aca_hwip`, `function aca_decode_bank_info`, `function aca_check_bank_hwip`, `function aca_match_bank_default`, `function aca_match_gfx_bank`, `function aca_match_sdma_bank`, `function aca_match_mmhub_bank`, `function aca_check_umc_de`, `function aca_check_umc_ue`, `function aca_check_umc_ce`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.