drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/ras/rascore/ras_aca_v1_0.h- Extension
.h- Size
- 3484 bytes
- Lines
- 72
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ras.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __RAS_ACA_V1_0_H__
#define __RAS_ACA_V1_0_H__
#include "ras.h"
#define ACA__REG__FIELD(x, h, l) (((x) & GENMASK_ULL(h, l)) >> l)
#define ACA_REG_STATUS_VAL(x) ACA__REG__FIELD(x, 63, 63)
#define ACA_REG_STATUS_OVERFLOW(x) ACA__REG__FIELD(x, 62, 62)
#define ACA_REG_STATUS_UC(x) ACA__REG__FIELD(x, 61, 61)
#define ACA_REG_STATUS_EN(x) ACA__REG__FIELD(x, 60, 60)
#define ACA_REG_STATUS_MISCV(x) ACA__REG__FIELD(x, 59, 59)
#define ACA_REG_STATUS_ADDRV(x) ACA__REG__FIELD(x, 58, 58)
#define ACA_REG_STATUS_PCC(x) ACA__REG__FIELD(x, 57, 57)
#define ACA_REG_STATUS_ERRCOREIDVAL(x) ACA__REG__FIELD(x, 56, 56)
#define ACA_REG_STATUS_TCC(x) ACA__REG__FIELD(x, 55, 55)
#define ACA_REG_STATUS_SYNDV(x) ACA__REG__FIELD(x, 53, 53)
#define ACA_REG_STATUS_CECC(x) ACA__REG__FIELD(x, 46, 46)
#define ACA_REG_STATUS_UECC(x) ACA__REG__FIELD(x, 45, 45)
#define ACA_REG_STATUS_DEFERRED(x) ACA__REG__FIELD(x, 44, 44)
#define ACA_REG_STATUS_POISON(x) ACA__REG__FIELD(x, 43, 43)
#define ACA_REG_STATUS_SCRUB(x) ACA__REG__FIELD(x, 40, 40)
#define ACA_REG_STATUS_ERRCOREID(x) ACA__REG__FIELD(x, 37, 32)
#define ACA_REG_STATUS_ADDRLSB(x) ACA__REG__FIELD(x, 29, 24)
#define ACA_REG_STATUS_ERRORCODEEXT(x) ACA__REG__FIELD(x, 21, 16)
#define ACA_REG_STATUS_ERRORCODE(x) ACA__REG__FIELD(x, 15, 0)
#define ACA_REG_IPID_MCATYPE(x) ACA__REG__FIELD(x, 63, 48)
#define ACA_REG_IPID_INSTANCEIDHI(x) ACA__REG__FIELD(x, 47, 44)
#define ACA_REG_IPID_HARDWAREID(x) ACA__REG__FIELD(x, 43, 32)
#define ACA_REG_IPID_INSTANCEIDLO(x) ACA__REG__FIELD(x, 31, 0)
#define ACA_REG_MISC0_VALID(x) ACA__REG__FIELD(x, 63, 63)
#define ACA_REG_MISC0_OVRFLW(x) ACA__REG__FIELD(x, 48, 48)
#define ACA_REG_MISC0_ERRCNT(x) ACA__REG__FIELD(x, 43, 32)
#define ACA_REG_SYND_ERRORINFORMATION(x) ACA__REG__FIELD(x, 17, 0)
/* NOTE: The following codes refers to the smu header file */
#define ACA_EXTERROR_CODE_CE 0x3a
#define ACA_EXTERROR_CODE_FAULT 0x3b
#define mmSMNAID_XCD0_MCA_SMU 0x36430400 /* SMN AID XCD0 */
#define mmSMNAID_XCD1_MCA_SMU 0x38430400 /* SMN AID XCD1 */
#define mmSMNXCD_XCD0_MCA_SMU 0x40430400 /* SMN XCD XCD0 */
#define mmSMNAID_AID0_MCA_SMU 0x03b30400 /* SMN AID AID0 */
extern const struct ras_aca_ip_func ras_aca_func_v1_0;
#endif
Annotation
- Immediate include surface: `ras.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.