drivers/gpu/drm/amd/ras/rascore/ras_core.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/ras/rascore/ras_core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/ras/rascore/ras_core.c- Extension
.c- Size
- 16043 bytes
- Lines
- 679
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ras.hras_core_status.h
Detected Declarations
function ras_core_convert_timestamp_to_timefunction ras_core_gpu_in_resetfunction ras_core_gpu_is_vffunction ras_core_gpu_is_rmafunction ras_core_seqno_fifo_writefunction ras_core_seqno_fifo_readfunction ras_core_gen_seqnofunction ras_core_put_seqnofunction ras_core_get_seqnofunction ras_core_eeprom_recoveryfunction ras_core_destroyfunction ras_core_sw_initfunction ras_core_sw_finifunction ras_core_hw_initfunction ras_core_hw_finifunction ras_core_handle_nbio_irqfunction ras_core_handle_fatal_errorfunction ras_core_get_curr_nps_modefunction ras_core_update_ecc_infofunction ras_core_query_block_ecc_datafunction ras_core_set_statusfunction ras_core_is_enabledfunction ras_core_get_utc_second_timestampfunction ras_core_translate_soc_pa_and_bankfunction ras_core_ras_interrupt_detectedfunction ras_core_get_gpu_memfunction ras_core_put_gpu_memfunction ras_core_is_readyfunction ras_core_check_safety_watermarkfunction ras_core_down_trylock_gpu_reset_lockfunction ras_core_down_gpu_reset_lockfunction ras_core_up_gpu_reset_lockfunction ras_core_event_notifyfunction ras_core_get_device_system_infofunction ras_core_convert_soc_pa_to_cur_nps_pages
Annotated Snippet
if (IS_LEAP_YEAR(year)) {
if (days < 366)
break;
days -= 366;
} else {
days -= 365;
}
year++;
}
days_in_month[1] += IS_LEAP_YEAR(year);
month = 0;
while (days >= days_in_month[month]) {
days -= days_in_month[month];
month++;
}
month++;
day = days + 1;
if (remaining_seconds) {
hour = remaining_seconds / seconds_per_hour;
minute = (remaining_seconds % seconds_per_hour) / seconds_per_minute;
second = remaining_seconds % seconds_per_minute;
}
tm->tm_year = year;
tm->tm_mon = month;
tm->tm_mday = day;
tm->tm_hour = hour;
tm->tm_min = minute;
tm->tm_sec = second;
return 0;
}
bool ras_core_gpu_in_reset(struct ras_core_context *ras_core)
{
uint32_t status = 0;
if (!ras_core)
return false;
if (ras_core->sys_fn &&
ras_core->sys_fn->check_gpu_status)
ras_core->sys_fn->check_gpu_status(ras_core, &status);
return (status & RAS_GPU_STATUS__IN_RESET) ? true : false;
}
bool ras_core_gpu_is_vf(struct ras_core_context *ras_core)
{
uint32_t status = 0;
if (!ras_core)
return false;
if (ras_core->sys_fn &&
ras_core->sys_fn->check_gpu_status)
ras_core->sys_fn->check_gpu_status(ras_core, &status);
return (status & RAS_GPU_STATUS__IS_VF) ? true : false;
}
bool ras_core_gpu_is_rma(struct ras_core_context *ras_core)
{
if (!ras_core)
return false;
return ras_core->is_rma;
}
static int ras_core_seqno_fifo_write(struct ras_core_context *ras_core,
enum ras_seqno_fifo fifo_type, uint64_t seqno)
{
int ret = 0;
struct kfifo *seqno_fifo = NULL;
if (fifo_type == SEQNO_FIFO_POISON_CREATION)
seqno_fifo = &ras_core->de_seqno_fifo;
else if (fifo_type == SEQNO_FIFO_POISON_CONSUMPTION)
seqno_fifo = &ras_core->consumption_seqno_fifo;
if (seqno_fifo)
ret = kfifo_in_spinlocked(seqno_fifo,
&seqno, sizeof(seqno), &ras_core->seqno_lock);
return ret ? 0 : -EINVAL;
}
Annotation
- Immediate include surface: `ras.h`, `ras_core_status.h`.
- Detected declarations: `function ras_core_convert_timestamp_to_time`, `function ras_core_gpu_in_reset`, `function ras_core_gpu_is_vf`, `function ras_core_gpu_is_rma`, `function ras_core_seqno_fifo_write`, `function ras_core_seqno_fifo_read`, `function ras_core_gen_seqno`, `function ras_core_put_seqno`, `function ras_core_get_seqno`, `function ras_core_eeprom_recovery`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.