drivers/gpu/drm/amd/ras/rascore/ras_gfx.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/ras/rascore/ras_gfx.h

Extension

.h

Size

1708 bytes

Lines

44

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct ras_gfx_ip_func
• struct ras_gfx

Annotated Snippet

struct ras_gfx_ip_func {
	int (*get_ta_subblock)(struct ras_core_context *ras_core,
		uint32_t error_type, uint32_t subblock, uint32_t *ta_subblock);
};

struct ras_gfx {
	uint32_t gfx_ip_version;
	const struct ras_gfx_ip_func *ip_func;
};

int ras_gfx_hw_init(struct ras_core_context *ras_core);
int ras_gfx_hw_fini(struct ras_core_context *ras_core);

int ras_gfx_get_ta_subblock(struct ras_core_context *ras_core,
		uint32_t error_type, uint32_t subblock, uint32_t *ta_subblock);

#endif

Annotation

• Detected declarations: `struct ras_gfx_ip_func`, `struct ras_gfx`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.