drivers/gpu/drm/arm/hdlcd_drv.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/arm/hdlcd_drv.h

Extension

.h

Size

1003 bytes

Lines

42

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct hdlcd_drm_private
• function hdlcd_write
• function hdlcd_read

Annotated Snippet

struct hdlcd_drm_private {
	struct drm_device		base;
	void __iomem			*mmio;
	struct clk			*clk;
	struct drm_crtc			crtc;
	struct drm_plane		*plane;
	unsigned int			irq;
#ifdef CONFIG_DEBUG_FS
	atomic_t buffer_underrun_count;
	atomic_t bus_error_count;
	atomic_t vsync_count;
	atomic_t dma_end_count;
#endif
};

#define drm_to_hdlcd_priv(x)	container_of(x, struct hdlcd_drm_private, base)
#define crtc_to_hdlcd_priv(x)	container_of(x, struct hdlcd_drm_private, crtc)

static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd,
			       unsigned int reg, u32 value)
{
	writel(value, hdlcd->mmio + reg);
}

static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
{
	return readl(hdlcd->mmio + reg);
}

int hdlcd_setup_crtc(struct drm_device *dev);
void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);

#endif /* __HDLCD_DRV_H__ */

Annotation

• Detected declarations: `struct hdlcd_drm_private`, `function hdlcd_write`, `function hdlcd_read`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.