drivers/gpu/drm/arm/malidp_hw.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/arm/malidp_hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/arm/malidp_hw.c- Extension
.c- Size
- 46730 bytes
- Lines
- 1393
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/types.hlinux/io.hvideo/videomode.hvideo/display_timing.hdrm/drm_fourcc.hdrm/drm_vblank.hdrm/drm_print.hmalidp_drv.hmalidp_hw.hmalidp_mw.h
Detected Declarations
function malidp500_query_hwfunction malidp500_enter_config_modefunction malidp500_leave_config_modefunction malidp500_in_config_modefunction malidp500_set_config_validfunction malidp500_modesetfunction malidp_format_get_bppfunction malidp500_rotmem_requiredfunction malidp500_se_write_pp_coefftabfunction malidp500_se_set_scaling_coeffsfunction malidp500_se_calc_mclkfunction malidp500_enable_memwritefunction malidp500_disable_memwritefunction malidp550_query_hwfunction malidp550_enter_config_modefunction malidp550_leave_config_modefunction malidp550_in_config_modefunction malidp550_set_config_validfunction malidp550_modesetfunction malidpx50_get_bytes_per_columnfunction malidp550_rotmem_requiredfunction malidp650_rotmem_requiredfunction malidp550_se_set_scaling_coeffsfunction malidp550_se_calc_mclkfunction malidp550_enable_memwritefunction malidp550_disable_memwritefunction malidp650_query_hwfunction malidp_hw_get_format_idfunction malidp_hw_format_is_linear_onlyfunction malidp_hw_format_is_afbc_onlyfunction malidp_hw_clear_irqfunction malidp_de_irqfunction malidp_de_irq_thread_handlerfunction malidp_de_irq_hw_initfunction malidp_de_irq_initfunction malidp_de_irq_finifunction malidp_se_irqfunction malidp_se_irq_hw_initfunction malidp_se_irq_thread_handlerfunction malidp_se_irq_initfunction malidp_se_irq_fini
Annotated Snippet
switch (fmt) {
case DRM_FORMAT_VUY101010:
bpp = 30;
break;
case DRM_FORMAT_YUV420_10BIT:
bpp = 15;
break;
case DRM_FORMAT_YUV420_8BIT:
bpp = 12;
break;
default:
bpp = 0;
}
}
return bpp;
}
static int malidp500_rotmem_required(struct malidp_hw_device *hwdev, u16 w,
u16 h, u32 fmt, bool has_modifier)
{
/*
* Each layer needs enough rotation memory to fit 8 lines
* worth of pixel data. Required size is then:
* size = rotated_width * (bpp / 8) * 8;
*/
int bpp = malidp_format_get_bpp(fmt);
return w * bpp;
}
static void malidp500_se_write_pp_coefftab(struct malidp_hw_device *hwdev,
u32 direction,
u16 addr,
u8 coeffs_id)
{
int i;
u16 scaling_control = MALIDP500_SE_CONTROL + MALIDP_SE_SCALING_CONTROL;
malidp_hw_write(hwdev,
direction | (addr & MALIDP_SE_COEFFTAB_ADDR_MASK),
scaling_control + MALIDP_SE_COEFFTAB_ADDR);
for (i = 0; i < ARRAY_SIZE(dp500_se_scaling_coeffs); ++i)
malidp_hw_write(hwdev, MALIDP_SE_SET_COEFFTAB_DATA(
dp500_se_scaling_coeffs[coeffs_id][i]),
scaling_control + MALIDP_SE_COEFFTAB_DATA);
}
static int malidp500_se_set_scaling_coeffs(struct malidp_hw_device *hwdev,
struct malidp_se_config *se_config,
struct malidp_se_config *old_config)
{
/* Get array indices into dp500_se_scaling_coeffs. */
u8 h = (u8)se_config->hcoeff - 1;
u8 v = (u8)se_config->vcoeff - 1;
if (WARN_ON(h >= ARRAY_SIZE(dp500_se_scaling_coeffs) ||
v >= ARRAY_SIZE(dp500_se_scaling_coeffs)))
return -EINVAL;
if ((h == v) && (se_config->hcoeff != old_config->hcoeff ||
se_config->vcoeff != old_config->vcoeff)) {
malidp500_se_write_pp_coefftab(hwdev,
(MALIDP_SE_V_COEFFTAB |
MALIDP_SE_H_COEFFTAB),
0, v);
} else {
if (se_config->vcoeff != old_config->vcoeff)
malidp500_se_write_pp_coefftab(hwdev,
MALIDP_SE_V_COEFFTAB,
0, v);
if (se_config->hcoeff != old_config->hcoeff)
malidp500_se_write_pp_coefftab(hwdev,
MALIDP_SE_H_COEFFTAB,
0, h);
}
return 0;
}
static long malidp500_se_calc_mclk(struct malidp_hw_device *hwdev,
struct malidp_se_config *se_config,
struct videomode *vm)
{
unsigned long mclk;
unsigned long pxlclk = vm->pixelclock; /* Hz */
unsigned long htotal = vm->hactive + vm->hfront_porch +
vm->hback_porch + vm->hsync_len;
unsigned long input_size = se_config->input_w * se_config->input_h;
unsigned long a = 10;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/types.h`, `linux/io.h`, `video/videomode.h`, `video/display_timing.h`, `drm/drm_fourcc.h`, `drm/drm_vblank.h`.
- Detected declarations: `function malidp500_query_hw`, `function malidp500_enter_config_mode`, `function malidp500_leave_config_mode`, `function malidp500_in_config_mode`, `function malidp500_set_config_valid`, `function malidp500_modeset`, `function malidp_format_get_bpp`, `function malidp500_rotmem_required`, `function malidp500_se_write_pp_coefftab`, `function malidp500_se_set_scaling_coeffs`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.