drivers/gpu/drm/armada/armada_plane.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/armada/armada_plane.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/armada/armada_plane.c- Extension
.c- Size
- 9151 bytes
- Lines
- 309
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_fourcc.hdrm/drm_plane_helper.hdrm/drm_print.harmada_crtc.harmada_drm.harmada_fb.harmada_gem.harmada_hw.harmada_plane.harmada_trace.h
Detected Declarations
function armada_drm_plane_calcfunction armada_drm_plane_atomic_checkfunction armada_drm_primary_plane_atomic_updatefunction drm_rect_widthfunction armada_drm_primary_plane_atomic_disablefunction armada_plane_resetfunction armada_drm_primary_plane_init
Annotated Snippet
drm_rect_width(&old_state->dst) != drm_rect_width(&new_state->dst)) {
cfg_mask |= CFG_GRA_HSMOOTH;
if (drm_rect_width(&new_state->src) >> 16 !=
drm_rect_width(&new_state->dst))
cfg |= CFG_GRA_HSMOOTH;
}
if (cfg_mask)
armada_reg_queue_mod(regs, idx, cfg, cfg_mask,
LCD_SPU_DMA_CTRL0);
dcrtc->regs_idx += idx;
}
static void armada_drm_primary_plane_atomic_disable(struct drm_plane *plane,
struct drm_atomic_commit *state)
{
struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
plane);
struct armada_crtc *dcrtc;
struct armada_regs *regs;
unsigned int idx = 0;
DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);
if (!old_state->crtc)
return;
DRM_DEBUG_KMS("[PLANE:%d:%s] was on [CRTC:%d:%s] with [FB:%d]\n",
plane->base.id, plane->name,
old_state->crtc->base.id, old_state->crtc->name,
old_state->fb->base.id);
dcrtc = drm_to_armada_crtc(old_state->crtc);
regs = dcrtc->regs + dcrtc->regs_idx;
/* Disable plane and power down most RAMs and FIFOs */
armada_reg_queue_mod(regs, idx, 0, CFG_GRA_ENA, LCD_SPU_DMA_CTRL0);
armada_reg_queue_mod(regs, idx, CFG_PDWN256x32 | CFG_PDWN256x24 |
CFG_PDWN32x32 | CFG_PDWN64x66,
0, LCD_SPU_SRAM_PARA1);
dcrtc->regs_idx += idx;
}
static const struct drm_plane_helper_funcs armada_primary_plane_helper_funcs = {
.atomic_check = armada_drm_plane_atomic_check,
.atomic_update = armada_drm_primary_plane_atomic_update,
.atomic_disable = armada_drm_primary_plane_atomic_disable,
};
void armada_plane_reset(struct drm_plane *plane)
{
struct armada_plane_state *st;
if (plane->state)
__drm_atomic_helper_plane_destroy_state(plane->state);
kfree(plane->state);
st = kzalloc_obj(*st);
if (st)
__drm_atomic_helper_plane_reset(plane, &st->base);
}
struct drm_plane_state *armada_plane_duplicate_state(struct drm_plane *plane)
{
struct armada_plane_state *st;
if (WARN_ON(!plane->state))
return NULL;
st = kmemdup(plane->state, sizeof(*st), GFP_KERNEL);
if (st)
__drm_atomic_helper_plane_duplicate_state(plane, &st->base);
return &st->base;
}
static const struct drm_plane_funcs armada_primary_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
.destroy = drm_plane_helper_destroy,
.reset = armada_plane_reset,
.atomic_duplicate_state = armada_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
};
int armada_drm_primary_plane_init(struct drm_device *drm,
struct drm_plane *primary)
{
int ret;
Annotation
- Immediate include surface: `drm/drm_atomic.h`, `drm/drm_atomic_helper.h`, `drm/drm_fourcc.h`, `drm/drm_plane_helper.h`, `drm/drm_print.h`, `armada_crtc.h`, `armada_drm.h`, `armada_fb.h`.
- Detected declarations: `function armada_drm_plane_calc`, `function armada_drm_plane_atomic_check`, `function armada_drm_primary_plane_atomic_update`, `function drm_rect_width`, `function armada_drm_primary_plane_atomic_disable`, `function armada_plane_reset`, `function armada_drm_primary_plane_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.