drivers/gpu/drm/armada/Kconfig

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/armada/Kconfig

Extension

[no extension]

Size

621 bytes

Lines

16

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: build/configuration rule

Status

atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only
config DRM_ARMADA
	tristate "DRM support for Marvell Armada SoCs"
	depends on DRM && HAVE_CLK && ARM && MMU
	select DRM_CLIENT_SELECTION
	select DRM_KMS_HELPER
	select FB_IOMEM_HELPERS if DRM_FBDEV_EMULATION
	help
	  Support the "LCD" controllers found on the Marvell Armada 510
	  devices.  There are two controllers on the device, each controller
	  supports graphics and video overlays.

	  This driver provides no built-in acceleration; acceleration is
	  performed by other IP found on the SoC.  This driver provides
	  kernel mode setting and buffer management to userspace.

Annotation

• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.