drivers/gpu/drm/ast/ast_2500.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/ast/ast_2500.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/ast/ast_2500.c
Extension
.c
Size
20592 bytes
Lines
679
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (timecnt != TIMEOUT) {
			data = ast_mindwm(ast, AST_REG_MCR300) & 0x000A0000;
			if (!data)
				pass = 1;
		}
		if (!pass) {
			ast_moutdwm(ast, AST_REG_MCR60, 0x00000000);
			udelay(10); /* delay 10 us */
			ast_moutdwm(ast, AST_REG_MCR60, 0x00000005);
		}
	}

	ast_moutdwm(ast, AST_REG_MCR60, 0x00000006);
}

/*
 * TODO: Review and fix the comments. The function below only detects
 *       up to 1 GiB of SDRAM.
 *
 * Check DRAM Size
 * 1Gb : 0x80000000 ~ 0x87FFFFFF
 * 2Gb : 0x80000000 ~ 0x8FFFFFFF
 * 4Gb : 0x80000000 ~ 0x9FFFFFFF
 * 8Gb : 0x80000000 ~ 0xBFFFFFFF
 */
static void check_dram_size_2500(struct ast_device *ast, u32 tRFC)
{
	u32 reg_04, reg_14;

	reg_04 = ast_mindwm(ast, AST_REG_MCR04) & 0xfffffffc;
	reg_14 = ast_mindwm(ast, AST_REG_MCR14) & 0xffffff00;

	ast_moutdwm(ast, AST_SDRAM(0x20100000), 0x41424344);
	ast_moutdwm(ast, AST_SDRAM(0x10100000), 0x35363738);
	ast_moutdwm(ast, AST_SDRAM(0x08100000), 0x292A2B2C);
	ast_moutdwm(ast, AST_SDRAM(0x00100000), 0x1D1E1F10);

	/* Check 8Gbit */
	if (ast_mindwm(ast, AST_SDRAM(0x20100000)) == 0x41424344) {
		reg_04 |= 0x03;
		reg_14 |= (tRFC >> 24) & 0xFF;
		/* Check 4Gbit */
	} else if (ast_mindwm(ast, AST_SDRAM(0x10100000)) == 0x35363738) {
		reg_04 |= 0x02;
		reg_14 |= (tRFC >> 16) & 0xFF;
		/* Check 2Gbit */
	} else if (ast_mindwm(ast, AST_SDRAM(0x08100000)) == 0x292A2B2C) {
		reg_04 |= 0x01;
		reg_14 |= (tRFC >> 8) & 0xFF;
	} else {
		reg_14 |= tRFC & 0xFF;
	}
	ast_moutdwm(ast, AST_REG_MCR04, reg_04);
	ast_moutdwm(ast, AST_REG_MCR14, reg_14);
}

static void enable_cache_2500(struct ast_device *ast)
{
	u32 reg_04, data;

	reg_04 = ast_mindwm(ast, AST_REG_MCR04);
	ast_moutdwm(ast, AST_REG_MCR04, reg_04 | 0x1000);

	do
		data = ast_mindwm(ast, AST_REG_MCR04);
	while (!(data & 0x80000));
	ast_moutdwm(ast, AST_REG_MCR04, reg_04 | 0x400);
}

static void set_mpll_2500(struct ast_device *ast)
{
	u32 mcr, data, param;

	/* Reset MMC */
	ast_moutdwm(ast, AST_REG_MCR00, AST_REG_MCR00_PROTECTION_KEY);
	ast_moutdwm(ast, AST_REG_MCR34, 0x00020080);
	for (mcr = AST_REG_MCR04; mcr <= AST_REG_MCR8C; mcr += 4)
		ast_moutdwm(ast, mcr, 0x00000000);
	ast_moutdwm(ast, AST_REG_MCR34, 0x00020000);

	ast_moutdwm(ast, AST_REG_SCU000, AST_REG_SCU000_PROTECTION_KEY);
	data = ast_mindwm(ast, AST_REG_SCU070) & 0x00800000;
	if (data) {
		/* CLKIN = 25MHz */
		param = 0x930023E0;
		ast_moutdwm(ast, AST_REG_SCU160, 0x00011320);
	} else {
		/* CLKIN = 24MHz */
		param = 0x93002400;
	}

Annotation

Implementation Notes