drivers/gpu/drm/ast/ast_post.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/ast/ast_post.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/ast/ast_post.c- Extension
.c- Size
- 2438 bytes
- Lines
- 92
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/pci.hdrm/drm_print.hast_drv.hast_post.h
Detected Declarations
function filesfunction mmc_testfunction mmc_test_burst
Annotated Snippet
if (++timeout > TIMEOUT) {
ast_moutdwm(ast, AST_REG_MCR70, 0x00000000);
return false;
}
} while (!data);
ast_moutdwm(ast, AST_REG_MCR70, 0x0);
return true;
}
bool mmc_test_burst(struct ast_device *ast, u32 datagen)
{
return mmc_test(ast, datagen, 0xc1);
}
Annotation
- Immediate include surface: `linux/delay.h`, `linux/pci.h`, `drm/drm_print.h`, `ast_drv.h`, `ast_post.h`.
- Detected declarations: `function files`, `function mmc_test`, `function mmc_test_burst`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.