drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c- Extension
.c- Size
- 41984 bytes
- Lines
- 1612
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cleanup.hlinux/clk.hlinux/component.hlinux/err.hlinux/export.hlinux/gpio/consumer.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/module.hlinux/of.hlinux/phy/phy.hlinux/platform_device.hdrm/bridge/analogix_dp.hdrm/display/drm_dp_aux_bus.hdrm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_bridge.hdrm/drm_crtc.hdrm/drm_device.hdrm/drm_edid.hdrm/drm_of.hdrm/drm_panel.hdrm/drm_print.hdrm/drm_probe_helper.hanalogix_dp_core.hanalogix_dp_reg.h
Detected Declarations
function analogix_dp_init_dpfunction analogix_dp_detect_hpdfunction analogix_dp_detect_sink_psrfunction analogix_dp_enable_sink_psrfunction analogix_dp_enable_rx_to_enhanced_modefunction analogix_dp_is_enhanced_mode_availablefunction analogix_dp_set_enhanced_modefunction analogix_dp_training_pattern_disfunction analogix_dp_link_startfunction analogix_dp_reduce_link_ratefunction analogix_dp_get_adjust_training_lanefunction analogix_dp_process_clock_recoveryfunction analogix_dp_process_equalizer_trainingfunction analogix_dp_get_max_rx_bandwidthfunction analogix_dp_get_max_rx_lane_countfunction analogix_dp_full_link_trainfunction analogix_dp_fast_link_trainfunction analogix_dp_train_linkfunction analogix_dp_config_videofunction analogix_dp_enable_scramblefunction analogix_dp_hardirqfunction analogix_dp_irq_threadfunction analogix_dp_fast_link_train_detectionfunction analogix_dp_commitfunction analogix_dp_enable_psrfunction analogix_dp_disable_psrfunction analogix_dp_bridge_atomic_checkfunction analogix_dp_bridge_detectfunction analogix_dp_bridge_attachfunction analogix_dp_bridge_atomic_pre_enablefunction analogix_dp_set_bridgefunction analogix_dp_bridge_mode_setfunction analogix_dp_bridge_atomic_enablefunction analogix_dp_bridge_disablefunction analogix_dp_bridge_atomic_disablefunction analogix_dp_bridge_atomic_post_disablefunction analogix_dp_dt_parse_pdatafunction analogix_dpaux_transferfunction analogix_dpaux_wait_hpd_assertedfunction analogix_dp_probefunction analogix_dp_suspendfunction analogix_dp_resumefunction analogix_dp_bindfunction analogix_dp_unbindfunction analogix_dp_start_crcfunction analogix_dp_stop_crcfunction analogix_dp_aux_done_probingfunction analogix_dp_finish_probe
Annotated Snippet
switch (dp->link_train.lt_state) {
case START:
retval = analogix_dp_link_start(dp);
if (retval)
dev_err(dp->dev, "LT link start failed!\n");
break;
case CLOCK_RECOVERY:
retval = analogix_dp_process_clock_recovery(dp);
if (retval)
dev_err(dp->dev, "LT CR failed!\n");
break;
case EQUALIZER_TRAINING:
retval = analogix_dp_process_equalizer_training(dp);
if (retval)
dev_err(dp->dev, "LT EQ failed!\n");
break;
case FINISHED:
training_finished = 1;
break;
case FAILED:
return -EREMOTEIO;
}
}
if (retval)
dev_err(dp->dev, "eDP link training failed (%d)\n", retval);
return retval;
}
static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
{
int ret;
u8 link_status[DP_LINK_STATUS_SIZE];
analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
ret = analogix_dp_wait_pll_locked(dp);
if (ret) {
DRM_DEV_ERROR(dp->dev, "Wait for pll lock failed %d\n", ret);
return ret;
}
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
* the DP inter pair skew issue for at least 10 us
*/
analogix_dp_reset_macro(dp);
analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
analogix_dp_set_lane_link_training(dp);
/* source Set training pattern 1 */
analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
/* From DP spec, pattern must be on-screen for a minimum 500us */
usleep_range(500, 600);
analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
/* From DP spec, pattern must be on-screen for a minimum 500us */
usleep_range(500, 600);
/* TODO: enhanced_mode?*/
analogix_dp_set_training_pattern(dp, DP_NONE);
/*
* Useful for debugging issues with fast link training, disable for more
* speed
*/
if (verify_fast_training) {
ret = drm_dp_dpcd_read_link_status(&dp->aux, link_status);
if (ret < 0) {
DRM_DEV_ERROR(dp->dev, "Read link status failed %d\n",
ret);
return ret;
}
if (!drm_dp_clock_recovery_ok(link_status, dp->link_train.lane_count)) {
DRM_DEV_ERROR(dp->dev, "Clock recovery failed\n");
analogix_dp_reduce_link_rate(dp);
return -EIO;
}
if (!drm_dp_channel_eq_ok(link_status, dp->link_train.lane_count)) {
DRM_DEV_ERROR(dp->dev, "Channel EQ failed\n");
analogix_dp_reduce_link_rate(dp);
return -EIO;
}
}
return 0;
}
static int analogix_dp_train_link(struct analogix_dp_device *dp)
Annotation
- Immediate include surface: `linux/cleanup.h`, `linux/clk.h`, `linux/component.h`, `linux/err.h`, `linux/export.h`, `linux/gpio/consumer.h`, `linux/interrupt.h`, `linux/io.h`.
- Detected declarations: `function analogix_dp_init_dp`, `function analogix_dp_detect_hpd`, `function analogix_dp_detect_sink_psr`, `function analogix_dp_enable_sink_psr`, `function analogix_dp_enable_rx_to_enhanced_mode`, `function analogix_dp_is_enhanced_mode_available`, `function analogix_dp_set_enhanced_mode`, `function analogix_dp_training_pattern_dis`, `function analogix_dp_link_start`, `function analogix_dp_reduce_link_rate`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.