drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c
Extension
.c
Size
4768 bytes
Lines
174
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct imx8mp_hdmi_pai {
	struct regmap	*regmap;
	struct device	*dev;
};

static void imx8mp_hdmi_pai_enable(struct dw_hdmi *dw_hdmi, int channel,
				   int width, int rate, int non_pcm,
				   int iec958)
{
	const struct dw_hdmi_plat_data *pdata = dw_hdmi_to_plat_data(dw_hdmi);
	struct imx8mp_hdmi_pai *hdmi_pai = pdata->priv_audio;
	int val;

	if (pm_runtime_resume_and_get(hdmi_pai->dev) < 0)
		return;

	/* PAI set control extended */
	val =  WTMK_HIGH(3) | WTMK_LOW(3);
	val |= NUM_CH(channel);
	regmap_write(hdmi_pai->regmap, HTX_PAI_CTRL_EXT, val);

	/* IEC60958 format */
	if (iec958) {
		val = FIELD_PREP_CONST(P_SEL,
				       __bf_shf(IEC958_SUBFRAME_PARITY));
		val |= FIELD_PREP_CONST(C_SEL,
					__bf_shf(IEC958_SUBFRAME_CHANNEL_STATUS));
		val |= FIELD_PREP_CONST(U_SEL,
					__bf_shf(IEC958_SUBFRAME_USER_DATA));
		val |= FIELD_PREP_CONST(V_SEL,
					__bf_shf(IEC958_SUBFRAME_VALIDITY));
		val |= FIELD_PREP_CONST(D_SEL,
					__bf_shf(IEC958_SUBFRAME_SAMPLE_24_MASK));
		val |= FIELD_PREP_CONST(PRE_SEL,
					__bf_shf(IEC958_SUBFRAME_PREAMBLE_MASK));
	} else {
		/*
		 * The allowed PCM widths are 24bit and 32bit, as they are supported
		 * by aud2htx module.
		 * for 24bit, D_SEL = 0, select all the bits.
		 * for 32bit, D_SEL = 8, select 24bit in MSB.
		 */
		val = FIELD_PREP(D_SEL, width - 24);
	}

	regmap_write(hdmi_pai->regmap, HTX_PAI_FIELD_CTRL, val);

	/* PAI start running */
	regmap_write(hdmi_pai->regmap, HTX_PAI_CTRL, ENABLE);
}

static void imx8mp_hdmi_pai_disable(struct dw_hdmi *dw_hdmi)
{
	const struct dw_hdmi_plat_data *pdata = dw_hdmi_to_plat_data(dw_hdmi);
	struct imx8mp_hdmi_pai *hdmi_pai = pdata->priv_audio;

	/* Stop PAI */
	regmap_write(hdmi_pai->regmap, HTX_PAI_CTRL, 0);

	pm_runtime_put_sync(hdmi_pai->dev);
}

static const struct regmap_config imx8mp_hdmi_pai_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.max_register = HTX_PAI_FIELD_CTRL,
};

static int imx8mp_hdmi_pai_bind(struct device *dev, struct device *master, void *data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_hdmi_plat_data *plat_data = data;
	struct imx8mp_hdmi_pai *hdmi_pai;
	struct resource *res;
	void __iomem *base;
	int ret;

	hdmi_pai = devm_kzalloc(dev, sizeof(*hdmi_pai), GFP_KERNEL);
	if (!hdmi_pai)
		return -ENOMEM;

	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
	if (IS_ERR(base))
		return PTR_ERR(base);

	hdmi_pai->regmap = devm_regmap_init_mmio_clk(dev, "apb", base,
						     &imx8mp_hdmi_pai_regmap_config);
	if (IS_ERR(hdmi_pai->regmap)) {
		dev_err(dev, "regmap init failed\n");

Annotation

Implementation Notes