drivers/gpu/drm/bridge/ite-it66121.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/bridge/ite-it66121.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/bridge/ite-it66121.c- Extension
.c- Size
- 46356 bytes
- Lines
- 1742
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/media-bus-format.hlinux/module.hlinux/device.hlinux/interrupt.hlinux/i2c.hlinux/bitfield.hlinux/property.hlinux/regmap.hlinux/of_graph.hlinux/gpio/consumer.hlinux/pinctrl/consumer.hlinux/regulator/consumer.hdrm/display/drm_hdmi_helper.hdrm/display/drm_hdmi_state_helper.hdrm/drm_atomic_helper.hdrm/drm_bridge.hdrm/drm_edid.hdrm/drm_modes.hdrm/drm_print.hdrm/drm_probe_helper.hsound/hdmi-codec.h
Detected Declarations
struct it66121_chip_infostruct it66121_ctxenum chip_idfunction it66121_hw_resetfunction it66121_preamble_ddcfunction it66121_fire_afefunction it66121_configure_inputfunction it66121_configure_afefunction it66121_wait_ddc_readyfunction it66121_abort_ddc_opsfunction it66121_get_edid_blockfunction it66121_is_hpd_detectfunction it66121_bridge_attachfunction it66121_set_modefunction it66121_set_mutefunction it66121_bridge_enablefunction it66121_bridge_disablefunction it66121_bridge_checkfunction it66121_bridge_detectfunction it66121_bridge_hpd_enablefunction it66121_bridge_hpd_disablefunction it66121_bridge_hdmi_tmds_char_rate_validfunction it66121_bridge_hdmi_clear_avi_infoframefunction it66121_bridge_hdmi_write_avi_infoframefunction it66121_bridge_hdmi_clear_hdmi_infoframefunction it66121_bridge_hdmi_write_hdmi_infoframefunction it66121_bridge_hdmi_clear_audio_infoframefunction it66121_bridge_hdmi_write_audio_infoframefunction it66121_irq_threaded_handlerfunction it661221_set_chstatfunction it661221_set_lpcm_audiofunction it661221_set_nctsfunction it661221_audio_output_enablefunction it661221_audio_ch_enablefunction it66121_hdmi_audio_preparefunction it66121_hdmi_audio_startupfunction it66121_hdmi_audio_shutdownfunction it66121_hdmi_audio_mute_streamfunction it66121_probefunction it66121_remove
Annotated Snippet
struct it66121_chip_info {
enum chip_id id;
u16 vid, pid;
};
struct it66121_ctx {
struct regmap *regmap;
struct drm_bridge bridge;
struct device *dev;
struct gpio_desc *gpio_reset;
struct i2c_client *client;
u32 bus_width;
struct mutex lock; /* Protects fields below and device registers */
struct {
u8 ch_enable;
u8 fs;
u8 swl;
bool auto_cts;
} audio;
enum chip_id id;
};
static const struct regmap_range_cfg it66121_regmap_banks[] = {
{
.name = "it66121",
.range_min = 0x00,
.range_max = 0x1FF,
.selector_reg = IT66121_CLK_BANK_REG,
.selector_mask = 0x1,
.selector_shift = 0,
.window_start = 0x00,
.window_len = 0x100,
},
};
static const struct regmap_config it66121_regmap_config = {
.val_bits = 8,
.reg_bits = 8,
.max_register = 0x1FF,
.ranges = it66121_regmap_banks,
.num_ranges = ARRAY_SIZE(it66121_regmap_banks),
};
static void it66121_hw_reset(struct it66121_ctx *ctx)
{
gpiod_set_value(ctx->gpio_reset, 1);
msleep(20);
gpiod_set_value(ctx->gpio_reset, 0);
}
static inline int it66121_preamble_ddc(struct it66121_ctx *ctx)
{
return regmap_write(ctx->regmap, IT66121_MASTER_SEL_REG, IT66121_MASTER_SEL_HOST);
}
static inline int it66121_fire_afe(struct it66121_ctx *ctx)
{
return regmap_write(ctx->regmap, IT66121_AFE_DRV_REG, 0);
}
/* TOFIX: Handle YCbCr Input & Output */
static int it66121_configure_input(struct it66121_ctx *ctx)
{
int ret;
u8 mode = IT66121_INPUT_MODE_RGB;
if (ctx->bus_width == 12)
mode |= IT66121_INPUT_MODE_DDR;
ret = regmap_write(ctx->regmap, IT66121_INPUT_MODE_REG, mode);
if (ret)
return ret;
return regmap_write(ctx->regmap, IT66121_INPUT_CSC_REG, IT66121_INPUT_CSC_NO_CONV);
}
/**
* it66121_configure_afe() - Configure the analog front end
* @ctx: it66121_ctx object
* @mode: mode to configure
*
* RETURNS:
* zero if success, a negative error code otherwise.
*/
static int it66121_configure_afe(struct it66121_ctx *ctx,
const struct drm_display_mode *mode)
{
int ret;
ret = regmap_write(ctx->regmap, IT66121_AFE_DRV_REG,
Annotation
- Immediate include surface: `linux/media-bus-format.h`, `linux/module.h`, `linux/device.h`, `linux/interrupt.h`, `linux/i2c.h`, `linux/bitfield.h`, `linux/property.h`, `linux/regmap.h`.
- Detected declarations: `struct it66121_chip_info`, `struct it66121_ctx`, `enum chip_id`, `function it66121_hw_reset`, `function it66121_preamble_ddc`, `function it66121_fire_afe`, `function it66121_configure_input`, `function it66121_configure_afe`, `function it66121_wait_ddc_ready`, `function it66121_abort_ddc_ops`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.