drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h- Extension
.h- Size
- 381 bytes
- Lines
- 20
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct dw_hdmistruct dw_hdmi_cec_opsstruct dw_hdmi_cec_data
Annotated Snippet
struct dw_hdmi_cec_ops {
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
u8 (*read)(struct dw_hdmi *hdmi, int offset);
void (*enable)(struct dw_hdmi *hdmi);
void (*disable)(struct dw_hdmi *hdmi);
};
struct dw_hdmi_cec_data {
struct dw_hdmi *hdmi;
const struct dw_hdmi_cec_ops *ops;
int irq;
};
#endif
Annotation
- Detected declarations: `struct dw_hdmi`, `struct dw_hdmi_cec_ops`, `struct dw_hdmi_cec_data`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.