drivers/gpu/drm/drm_edid.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/drm_edid.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/drm_edid.c
Extension
.c
Size
238032 bytes
Lines
7666
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct amd_vsdb_v3_payload {
	u8 oui[3];
	u8 version;
	u8 feature_caps;
	u8 rsvd0[3];
	u8 cs_eotf_support;
	u8 lum1_max;
	u8 lum1_min;
	u8 lum2_max;
	u8 lum2_min;
	u8 rsvd1[2];
	/*
	 * Bytes beyond AMD_VSDB_V3_PAYLOAD_MIN_LEN are optional; a
	 * monitor may provide a payload as short as 15 bytes.  Always
	 * check cea_db_payload_len() before accessing extra[].
	 */
	u8 extra[AMD_VSDB_V3_PAYLOAD_MAX_LEN - AMD_VSDB_V3_PAYLOAD_MIN_LEN];
} __packed;

struct detailed_mode_closure {
	struct drm_connector *connector;
	const struct drm_edid *drm_edid;
	bool preferred;
	int modes;
};

struct drm_edid_match_closure {
	const struct drm_edid_ident *ident;
	bool matched;
};

#define LEVEL_DMT	0
#define LEVEL_GTF	1
#define LEVEL_GTF2	2
#define LEVEL_CVT	3

#define EDID_QUIRK(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _quirks) \
{ \
	.ident = { \
		.panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, \
						     vend_chr_2, product_id), \
	}, \
	.quirks = _quirks \
}

static const struct edid_quirk {
	const struct drm_edid_ident ident;
	u32 quirks;
} edid_quirk_list[] = {
	/* Acer AL1706 */
	EDID_QUIRK('A', 'C', 'R', 44358, BIT(EDID_QUIRK_PREFER_LARGE_60)),
	/* Acer F51 */
	EDID_QUIRK('A', 'P', 'I', 0x7602, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
	EDID_QUIRK('A', 'E', 'O', 0, BIT(EDID_QUIRK_FORCE_6BPC)),

	/* BenQ GW2765 */
	EDID_QUIRK('B', 'N', 'Q', 0x78d6, BIT(EDID_QUIRK_FORCE_8BPC)),

	/* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
	EDID_QUIRK('B', 'O', 'E', 0x78b, BIT(EDID_QUIRK_FORCE_6BPC)),

	/* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
	EDID_QUIRK('C', 'P', 'T', 0x17df, BIT(EDID_QUIRK_FORCE_6BPC)),

	/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
	EDID_QUIRK('S', 'D', 'C', 0x3652, BIT(EDID_QUIRK_FORCE_6BPC)),

	/* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
	EDID_QUIRK('B', 'O', 'E', 0x0771, BIT(EDID_QUIRK_FORCE_6BPC)),

	/* Belinea 10 15 55 */
	EDID_QUIRK('M', 'A', 'X', 1516, BIT(EDID_QUIRK_PREFER_LARGE_60)),
	EDID_QUIRK('M', 'A', 'X', 0x77e, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	/* Envision Peripherals, Inc. EN-7100e */
	EDID_QUIRK('E', 'P', 'I', 59264, BIT(EDID_QUIRK_135_CLOCK_TOO_HIGH)),
	/* Envision EN2028 */
	EDID_QUIRK('E', 'P', 'I', 8232, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	/* Funai Electronics PM36B */
	EDID_QUIRK('F', 'C', 'M', 13600, BIT(EDID_QUIRK_PREFER_LARGE_75) |
					 BIT(EDID_QUIRK_DETAILED_IN_CM)),

	/* LG 27GP950 */
	EDID_QUIRK('G', 'S', 'M', 0x5bbf, BIT(EDID_QUIRK_CAP_DSC_15BPP)),

	/* LG 27GN950 */
	EDID_QUIRK('G', 'S', 'M', 0x5b9a, BIT(EDID_QUIRK_CAP_DSC_15BPP)),

Annotation

Implementation Notes