drivers/gpu/drm/exynos/regs-decon7.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/exynos/regs-decon7.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/exynos/regs-decon7.h
Extension
.h
Size
11038 bytes
Lines
349
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef EXYNOS_REGS_DECON7_H
#define EXYNOS_REGS_DECON7_H

/* VIDCON0 */
#define VIDCON0					0x00

#define VIDCON0_SWRESET				(1 << 28)
#define VIDCON0_DECON_STOP_STATUS		(1 << 2)
#define VIDCON0_ENVID				(1 << 1)
#define VIDCON0_ENVID_F				(1 << 0)

/* VIDOUTCON0 */
#define VIDOUTCON0				0x4

#define VIDOUTCON0_DUAL_MASK			(0x3 << 24)
#define VIDOUTCON0_DUAL_ON			(0x3 << 24)
#define VIDOUTCON0_DISP_IF_1_ON			(0x2 << 24)
#define VIDOUTCON0_DISP_IF_0_ON			(0x1 << 24)
#define VIDOUTCON0_DUAL_OFF			(0x0 << 24)
#define VIDOUTCON0_IF_SHIFT			23
#define VIDOUTCON0_IF_MASK			(0x1 << 23)
#define VIDOUTCON0_RGBIF			(0x0 << 23)
#define VIDOUTCON0_I80IF			(0x1 << 23)

/* VIDCON3 */
#define VIDCON3					0x8

/* VIDCON4 */
#define VIDCON4					0xC
#define VIDCON4_FIFOCNT_START_EN		(1 << 0)

/* VCLKCON0 */
#define VCLKCON0				0x10
#define VCLKCON0_CLKVALUP			(1 << 8)
#define VCLKCON0_VCLKFREE			(1 << 0)

/* VCLKCON */
#define VCLKCON1				0x14
#define VCLKCON1_CLKVAL_NUM_VCLK(val)		(((val) & 0xff) << 0)
#define VCLKCON2				0x18

/* SHADOWCON */
#define SHADOWCON				0x30

#define SHADOWCON_WINx_PROTECT(_shf, _win)	(1 << ((_shf) + (_win)))

/* WINCONx */
#define WINCON(_win)				(0x50 + ((_win) * 4))

#define WINCONx_BUFSTATUS			(0x3 << 30)
#define WINCONx_BUFSEL_MASK			(0x3 << 28)
#define WINCONx_BUFSEL_SHIFT			28
#define WINCONx_TRIPLE_BUF_MODE			(0x1 << 18)
#define WINCONx_DOUBLE_BUF_MODE			(0x0 << 18)
#define WINCONx_BURSTLEN_16WORD(_shf)		(0x0 << (_shf))
#define WINCONx_BURSTLEN_8WORD(_shf)		(0x1 << (_shf))
#define WINCONx_BURSTLEN_MASK(_shf)		(0x1 << (_shf))
#define WINCONx_BLD_PLANE			(0 << 8)
#define WINCONx_BLD_PIX				(1 << 8)
#define WINCONx_ALPHA_MUL			(1 << 7)

#define WINCONx_BPPMODE_MASK			(0xf << 2)
#define WINCONx_BPPMODE_SHIFT			2
#define WINCONx_BPPMODE_16BPP_565		(0x8 << 2)
#define WINCONx_BPPMODE_24BPP_BGRx		(0x7 << 2)
#define WINCONx_BPPMODE_24BPP_RGBx		(0x6 << 2)
#define WINCONx_BPPMODE_24BPP_xBGR		(0x5 << 2)
#define WINCONx_BPPMODE_24BPP_xRGB		(0x4 << 2)
#define WINCONx_BPPMODE_32BPP_BGRA		(0x3 << 2)
#define WINCONx_BPPMODE_32BPP_RGBA		(0x2 << 2)
#define WINCONx_BPPMODE_32BPP_ABGR		(0x1 << 2)
#define WINCONx_BPPMODE_32BPP_ARGB		(0x0 << 2)
#define WINCONx_ALPHA_SEL			(1 << 1)
#define WINCONx_ENWIN				(1 << 0)

#define WINCON1_ALPHA_MUL_F			(1 << 7)
#define WINCON2_ALPHA_MUL_F			(1 << 7)
#define WINCON3_ALPHA_MUL_F			(1 << 7)
#define WINCON4_ALPHA_MUL_F			(1 << 7)

/*  VIDOSDxH: The height for the OSD image(READ ONLY)*/
#define VIDOSD_H(_x)				(0x80 + ((_x) * 4))

/* Frame buffer start addresses: VIDWxxADD0n */
#define VIDW_BUF_START(_base, _win)		((_base) + ((_win) * 0x10))
#define VIDW_BUF_START1(_base, _win)		((_base) + ((_win) * 0x10))
#define VIDW_BUF_START2(_base, _win)		((_base) + ((_win) * 0x10))

#define VIDW_WHOLE_X(_win)			(0x0130 + ((_win) * 8))
#define VIDW_WHOLE_Y(_win)			(0x0134 + ((_win) * 8))

Annotation

Implementation Notes