drivers/gpu/drm/exynos/regs-scaler.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/exynos/regs-scaler.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/exynos/regs-scaler.h- Extension
.h- Size
- 16585 bytes
- Lines
- 424
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef EXYNOS_REGS_SCALER_H
#define EXYNOS_REGS_SCALER_H
/* Register part */
/* Global setting */
#define SCALER_STATUS 0x0 /* no shadow */
#define SCALER_CFG 0x4
/* Interrupt */
#define SCALER_INT_EN 0x8 /* no shadow */
#define SCALER_INT_STATUS 0xc /* no shadow */
/* SRC */
#define SCALER_SRC_CFG 0x10
#define SCALER_SRC_Y_BASE 0x14
#define SCALER_SRC_CB_BASE 0x18
#define SCALER_SRC_CR_BASE 0x294
#define SCALER_SRC_SPAN 0x1c
#define SCALER_SRC_Y_POS 0x20
#define SCALER_SRC_WH 0x24
#define SCALER_SRC_C_POS 0x28
/* DST */
#define SCALER_DST_CFG 0x30
#define SCALER_DST_Y_BASE 0x34
#define SCALER_DST_CB_BASE 0x38
#define SCALER_DST_CR_BASE 0x298
#define SCALER_DST_SPAN 0x3c
#define SCALER_DST_WH 0x40
#define SCALER_DST_POS 0x44
/* Ratio */
#define SCALER_H_RATIO 0x50
#define SCALER_V_RATIO 0x54
/* Rotation */
#define SCALER_ROT_CFG 0x58
/* Coefficient */
/*
* YHCOEF_{x}{A|B|C|D} CHCOEF_{x}{A|B|C|D}
*
* A B C D A B C D
* 0 60 64 68 6c 140 144 148 14c
* 1 70 74 78 7c 150 154 158 15c
* 2 80 84 88 8c 160 164 168 16c
* 3 90 94 98 9c 170 174 178 17c
* 4 a0 a4 a8 ac 180 184 188 18c
* 5 b0 b4 b8 bc 190 194 198 19c
* 6 c0 c4 c8 cc 1a0 1a4 1a8 1ac
* 7 d0 d4 d8 dc 1b0 1b4 1b8 1bc
* 8 e0 e4 e8 ec 1c0 1c4 1c8 1cc
*
*
* YVCOEF_{x}{A|B} CVCOEF_{x}{A|B}
*
* A B A B
* 0 f0 f4 1d0 1d4
* 1 f8 fc 1d8 1dc
* 2 100 104 1e0 1e4
* 3 108 10c 1e8 1ec
* 4 110 114 1f0 1f4
* 5 118 11c 1f8 1fc
* 6 120 124 200 204
* 7 128 12c 208 20c
* 8 130 134 210 214
*/
#define _SCALER_HCOEF_DELTA(r, c) ((r) * 0x10 + (c) * 0x4)
#define _SCALER_VCOEF_DELTA(r, c) ((r) * 0x8 + (c) * 0x4)
#define SCALER_YHCOEF(r, c) (0x60 + _SCALER_HCOEF_DELTA((r), (c)))
#define SCALER_YVCOEF(r, c) (0xf0 + _SCALER_VCOEF_DELTA((r), (c)))
#define SCALER_CHCOEF(r, c) (0x140 + _SCALER_HCOEF_DELTA((r), (c)))
#define SCALER_CVCOEF(r, c) (0x1d0 + _SCALER_VCOEF_DELTA((r), (c)))
/* Color Space Conversion */
#define SCALER_CSC_COEF(x, y) (0x220 + (y) * 0xc + (x) * 0x4)
/* Dithering */
#define SCALER_DITH_CFG 0x250
/* Version Number */
#define SCALER_VER 0x260 /* no shadow */
/* Cycle count and Timeout */
#define SCALER_CYCLE_COUNT 0x278 /* no shadow */
#define SCALER_TIMEOUT_CTRL 0x2c0 /* no shadow */
#define SCALER_TIMEOUT_CNT 0x2c4 /* no shadow */
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.