drivers/gpu/drm/gma500/power.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/gma500/power.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/gma500/power.c- Extension
.c- Size
- 6594 bytes
- Lines
- 233
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gem.hpower.hpsb_drv.hpsb_reg.hpsb_intel_reg.hpsb_irq.hlinux/mutex.hlinux/pm_runtime.h
Detected Declarations
function Copyrightfunction gma_power_uninitfunction gma_suspend_displayfunction gma_resume_displayfunction gma_suspend_pcifunction gma_resume_pcifunction gma_power_suspendfunction gma_power_resumefunction gma_power_beginfunction gma_power_begin
Annotated Snippet
#include "gem.h"
#include "power.h"
#include "psb_drv.h"
#include "psb_reg.h"
#include "psb_intel_reg.h"
#include "psb_irq.h"
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
/**
* gma_power_init - initialise power manager
* @dev: our device
*
* Set up for power management tracking of our hardware.
*/
void gma_power_init(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
/* FIXME: Move APM/OSPM base into relevant device code */
dev_priv->apm_base = dev_priv->apm_reg & 0xffff;
dev_priv->ospm_base &= 0xffff;
if (dev_priv->ops->init_pm)
dev_priv->ops->init_pm(dev);
/*
* Runtime pm support is broken atm. So for now unconditionally
* call pm_runtime_get() here and put it again in psb_driver_unload()
*
* To fix this we need to call pm_runtime_get() once for each active
* pipe at boot and then put() / get() for each pipe disable / enable
* so that the device gets runtime suspended when no pipes are active.
* Once this is in place the pm_runtime_get() below should be replaced
* by a pm_runtime_allow() call to undo the pm_runtime_forbid() from
* pci_pm_init().
*/
pm_runtime_get(dev->dev);
dev_priv->pm_initialized = true;
}
/**
* gma_power_uninit - end power manager
* @dev: device to end for
*
* Undo the effects of gma_power_init
*/
void gma_power_uninit(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
if (!dev_priv->pm_initialized)
return;
pm_runtime_put_noidle(dev->dev);
}
/**
* gma_suspend_display - suspend the display logic
* @dev: our DRM device
*
* Suspend the display logic of the graphics interface
*/
static void gma_suspend_display(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
dev_priv->ops->save_regs(dev);
dev_priv->ops->power_down(dev);
}
/**
* gma_resume_display - resume display side logic
* @pdev: PCI device
*
* Resume the display hardware restoring state and enabling
* as necessary.
*/
static void gma_resume_display(struct pci_dev *pdev)
{
struct drm_device *dev = pci_get_drvdata(pdev);
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
/* turn on the display power island */
dev_priv->ops->power_up(dev);
PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
pci_write_config_word(pdev, PSB_GMCH_CTRL,
dev_priv->gmch_ctrl | _PSB_GMCH_ENABLED);
Annotation
- Immediate include surface: `gem.h`, `power.h`, `psb_drv.h`, `psb_reg.h`, `psb_intel_reg.h`, `psb_irq.h`, `linux/mutex.h`, `linux/pm_runtime.h`.
- Detected declarations: `function Copyright`, `function gma_power_uninit`, `function gma_suspend_display`, `function gma_resume_display`, `function gma_suspend_pci`, `function gma_resume_pci`, `function gma_power_suspend`, `function gma_power_resume`, `function gma_power_begin`, `function gma_power_begin`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.