drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c
Extension
.c
Size
4968 bytes
Lines
169
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (buf_data_cnt != msg->size) {
			/* only the successful part of data is read */
			return -EBUSY;
		}

		/* all data is successfully read */
		hibmc_dp_aux_read_data(dp, msg->buffer, msg->size);
		return msg->size;
	default:
		return -EINVAL;
	}
}

/* ret >= 0 ,ret is size; ret < 0, ret is err code */
static ssize_t hibmc_dp_aux_xfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
{
	struct hibmc_dp *dp_priv = container_of(aux, struct hibmc_dp, aux);
	struct hibmc_dp_dev *dp = dp_priv->dp_dev;
	u32 aux_cmd;
	int ret;
	u32 val; /* val will be assigned at the beginning of readl_poll_timeout function */

	writel(0, dp->base + HIBMC_DP_AUX_WR_DATA0);
	writel(0, dp->base + HIBMC_DP_AUX_WR_DATA1);
	writel(0, dp->base + HIBMC_DP_AUX_WR_DATA2);
	writel(0, dp->base + HIBMC_DP_AUX_WR_DATA3);

	hibmc_dp_aux_write_data(dp, msg->buffer, msg->size);

	aux_cmd = hibmc_dp_aux_build_cmd(msg);
	writel(aux_cmd, dp->base + HIBMC_DP_AUX_CMD_ADDR);

	/* enable aux transfer */
	hibmc_dp_reg_write_field(dp, HIBMC_DP_AUX_REQ, HIBMC_DP_CFG_AUX_REQ, 0x1);
	ret = readl_poll_timeout(dp->base + HIBMC_DP_AUX_REQ, val,
				 !(val & HIBMC_DP_CFG_AUX_REQ), 50, 5000);
	if (ret) {
		hibmc_dp_aux_reset(dp);
		return ret;
	}

	return hibmc_dp_aux_parse_xfer(dp, msg);
}

void hibmc_dp_aux_init(struct hibmc_dp *dp)
{
	hibmc_dp_reg_write_field(dp->dp_dev, HIBMC_DP_AUX_REQ, HIBMC_DP_CFG_AUX_SYNC_LEN_SEL, 0x0);
	hibmc_dp_reg_write_field(dp->dp_dev, HIBMC_DP_AUX_REQ, HIBMC_DP_CFG_AUX_TIMER_TIMEOUT, 0x1);
	hibmc_dp_reg_write_field(dp->dp_dev, HIBMC_DP_AUX_REQ, HIBMC_DP_CFG_AUX_MIN_PULSE_NUM,
				 HIBMC_DP_MIN_PULSE_NUM);

	dp->aux.transfer = hibmc_dp_aux_xfer;
	dp->aux.name = "HIBMC DRM dp aux";
	dp->aux.drm_dev = dp->drm_dev;
	drm_dp_aux_init(&dp->aux);
	dp->dp_dev->aux = &dp->aux;
}

Annotation

Implementation Notes