drivers/gpu/drm/i915/display/dvo_ch7xxx.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/dvo_ch7xxx.c- Extension
.c- Size
- 8876 bytes
- Lines
- 388
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hintel_display_types.hintel_dvo_dev.h
Detected Declarations
struct ch7xxx_privfunction ch7xxx_readbfunction ch7xxx_writebfunction ch7xxx_initfunction ch7xxx_detectfunction ch7xxx_mode_validfunction ch7xxx_mode_setfunction ch7xxx_dpmsfunction ch7xxx_get_hw_statefunction ch7xxx_dump_regsfunction ch7xxx_destroy
Annotated Snippet
struct ch7xxx_priv {
bool quiet;
};
static char *ch7xxx_get_id(u8 vid)
{
int i;
for (i = 0; i < ARRAY_SIZE(ch7xxx_ids); i++) {
if (ch7xxx_ids[i].vid == vid)
return ch7xxx_ids[i].name;
}
return NULL;
}
static char *ch7xxx_get_did(u8 did)
{
int i;
for (i = 0; i < ARRAY_SIZE(ch7xxx_dids); i++) {
if (ch7xxx_dids[i].did == did)
return ch7xxx_dids[i].name;
}
return NULL;
}
/** Reads an 8 bit register */
static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
{
struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
u8 out_buf[2];
u8 in_buf[2];
struct i2c_msg msgs[] = {
{
.addr = dvo->target_addr,
.flags = 0,
.len = 1,
.buf = out_buf,
},
{
.addr = dvo->target_addr,
.flags = I2C_M_RD,
.len = 1,
.buf = in_buf,
}
};
out_buf[0] = addr;
out_buf[1] = 0;
if (i2c_transfer(adapter, msgs, 2) == 2) {
*ch = in_buf[0];
return true;
}
if (!ch7xxx->quiet) {
DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
addr, adapter->name, dvo->target_addr);
}
return false;
}
/** Writes an 8 bit register */
static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
{
struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
struct i2c_adapter *adapter = dvo->i2c_bus;
u8 out_buf[2];
struct i2c_msg msg = {
.addr = dvo->target_addr,
.flags = 0,
.len = 2,
.buf = out_buf,
};
out_buf[0] = addr;
out_buf[1] = ch;
if (i2c_transfer(adapter, &msg, 1) == 1)
return true;
if (!ch7xxx->quiet) {
DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
addr, adapter->name, dvo->target_addr);
}
Annotation
- Immediate include surface: `drm/drm_print.h`, `intel_display_types.h`, `intel_dvo_dev.h`.
- Detected declarations: `struct ch7xxx_priv`, `function ch7xxx_readb`, `function ch7xxx_writeb`, `function ch7xxx_init`, `function ch7xxx_detect`, `function ch7xxx_mode_valid`, `function ch7xxx_mode_set`, `function ch7xxx_dpms`, `function ch7xxx_get_hw_state`, `function ch7xxx_dump_regs`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.