drivers/gpu/drm/i915/display/dvo_ns2501.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/dvo_ns2501.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/dvo_ns2501.c- Extension
.c- Size
- 22424 bytes
- Lines
- 711
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hintel_display_types.hintel_dvo_dev.h
Detected Declarations
struct ns2501_regstruct ns2501_configurationstruct ns2501_privfunction ns2501_readbfunction ns2501_writebfunction ns2501_initfunction ns2501_detectfunction ns2501_mode_validfunction ns2501_mode_setfunction ns2501_get_hw_statefunction ns2501_dpmsfunction ns2501_destroy
Annotated Snippet
struct ns2501_reg {
u8 offset;
u8 value;
};
/*
* The following structure keeps the complete configuration of
* the DVO, given a specific output configuration.
* This is pretty much guess-work from reverse-engineering, so
* read all this with a grain of salt.
*/
struct ns2501_configuration {
u8 sync; /* configuration of the C0 register */
u8 conf; /* configuration register 8 */
u8 syncb; /* configuration register 41 */
u8 dither; /* configuration of the dithering */
u8 pll_a; /* PLL configuration, register A, 1B */
u16 pll_b; /* PLL configuration, register B, 1C/1D */
u16 hstart; /* horizontal start, registers C1/C2 */
u16 hstop; /* horizontal total, registers C3/C4 */
u16 vstart; /* vertical start, registers C5/C6 */
u16 vstop; /* vertical total, registers C7/C8 */
u16 vsync; /* manual vertical sync start, 80/81 */
u16 vtotal; /* number of lines generated, 82/83 */
u16 hpos; /* horizontal position + 256, 98/99 */
u16 vpos; /* vertical position, 8e/8f */
u16 voffs; /* vertical output offset, 9c/9d */
u16 hscale; /* horizontal scaling factor, b8/b9 */
u16 vscale; /* vertical scaling factor, 10/11 */
};
/*
* DVO configuration values, partially based on what the BIOS
* of the Fujitsu Lifebook S6010 writes into registers,
* partially found by manual tweaking. These configurations assume
* a 1024x768 panel.
*/
static const struct ns2501_configuration ns2501_modes[] = {
[MODE_640x480] = {
.sync = NS2501_C0_ENABLE | NS2501_C0_VSYNC,
.conf = NS2501_8_VEN | NS2501_8_HEN | NS2501_8_PD,
.syncb = 0x32,
.dither = 0x0f,
.pll_a = 17,
.pll_b = 852,
.hstart = 144,
.hstop = 783,
.vstart = 22,
.vstop = 514,
.vsync = 2047, /* actually, ignored with this config */
.vtotal = 1341,
.hpos = 0,
.vpos = 16,
.voffs = 36,
.hscale = 40960,
.vscale = 40960
},
[MODE_800x600] = {
.sync = NS2501_C0_ENABLE |
NS2501_C0_HSYNC | NS2501_C0_VSYNC,
.conf = NS2501_8_VEN | NS2501_8_HEN | NS2501_8_PD,
.syncb = 0x00,
.dither = 0x0f,
.pll_a = 25,
.pll_b = 612,
.hstart = 215,
.hstop = 1016,
.vstart = 26,
.vstop = 627,
.vsync = 807,
.vtotal = 1341,
.hpos = 0,
.vpos = 4,
.voffs = 35,
.hscale = 51248,
.vscale = 51232
},
[MODE_1024x768] = {
.sync = NS2501_C0_ENABLE | NS2501_C0_VSYNC,
.conf = NS2501_8_VEN | NS2501_8_HEN | NS2501_8_PD,
.syncb = 0x32,
.dither = 0x0f,
.pll_a = 11,
.pll_b = 1350,
.hstart = 276,
.hstop = 1299,
.vstart = 15,
.vstop = 1056,
.vsync = 2047,
.vtotal = 1341,
Annotation
- Immediate include surface: `drm/drm_print.h`, `intel_display_types.h`, `intel_dvo_dev.h`.
- Detected declarations: `struct ns2501_reg`, `struct ns2501_configuration`, `struct ns2501_priv`, `function ns2501_readb`, `function ns2501_writeb`, `function ns2501_init`, `function ns2501_detect`, `function ns2501_mode_valid`, `function ns2501_mode_set`, `function ns2501_get_hw_state`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.